Cisco Intel Xeon L5640 マニュアル

目次

• 1 Introduction

  11
  • 1.1 Processor Features

    12
  • 1.2 Platform Features

    12
  • 1.3 Terminology

    13
  • 1.4 References

    15
• 2 Electrical Specifications

  17
  • 2.1 Processor Signaling

    17
    • 2.1.1 Intel® QuickPath Interconnect

      17
    • 2.1.2 DDR3 Signal Groups

      17
    • 2.1.3 Platform Environmental Control Interface (PECI)

      17
    • 2.1.4 Processor Sideband Signals

      18
    • 2.1.5 System Reference Clock

      18
    • 2.1.6 Test Access Port (TAP) Signals

      19
    • 2.1.7 Power / Other Signals

      20
    • 2.1.8 Reserved or Unused Signals

      27
  • 2.2 Signal Group Summary

    28
  • 2.3 Mixing Processors

    29
  • 2.4 Flexible Motherboard Guidelines (FMB)

    30
  • 2.5 Absolute Maximum and Minimum Ratings

    31
  • 2.6 Processor DC Specifications

    32
    • 2.6.1 VCC Overshoot Specifications

      35
    • 2.6.2 Die Voltage Validation

      36
  • 2.7 Intel® QuickPath Interconnect Specifications

    47
  • 2.8 AC Specifications

    49
  • 2.9 Processor AC Timing Waveforms

    56
• 3 Signal Quality Specifications

  67
  • 3.1 Overshoot/Undershoot Tolerance

    67
• 4 Package Mechanical Specifications

  69
  • 4.1 Package Mechanical Specifications

    69
    • 4.1.1 Package Mechanical Drawing

      70
    • 4.1.2 Processor Component Keep-Out Zones

      73
    • 4.1.3 Package Loading Specifications

      73
    • 4.1.4 Package Handling Guidelines

      73
    • 4.1.5 Package Insertion Specifications

      73
    • 4.1.6 Processor Mass Specification

      74
    • 4.1.7 Processor Materials

      74
    • 4.1.8 Processor Markings

      74
• 5 Land Listing

  75
  • 5.1 Listing by Land Name

    75
  • 5.2 Listing by Land Number

    92
• 6 Signal Definitions

  111
  • 6.1 Signal Definitions

    111
• 7 Thermal Specifications

  115
  • 7.1 Package Thermal Specifications

    115
    • 7.1.1 Thermal Specifications

      115
    • 7.1.2 Thermal Metrology

      130
  • 7.2 Processor Thermal Features

    130
    • 7.2.1 Processor Temperature

      130
    • 7.2.2 Adaptive Thermal Monitor

      131
    • 7.2.3 On-Demand Mode

      133
    • 7.2.4 PROCHOT# Signal

      133
    • 7.2.5 THERMTRIP# Signal

      134
  • 7.3 Platform Environment Control Interface (PECI)

    134
    • 7.3.1 PECI Client Capabilities

      135
    • 7.3.2 Client Command Suite

      136
    • 7.3.3 Multi-Domain Commands

      155
    • 7.3.4 Client Responses

      155
    • 7.3.5 Originator Responses

      157
    • 7.3.6 Temperature Data

      157
    • 7.3.7 Client Management

      158
  • 7.4 Storage Conditions Specifications

    160
• 8 Features

  163
  • 8.1 Power-On Configuration (POC)

    163
  • 8.2 Clock Control and Low Power States

    164
    • 8.2.1 Thread and Core Power State Descriptions

      165
    • 8.2.2 Package Power State Descriptions

      166
    • 8.2.3 Intel Xeon Processor 5600 Series C-State Power Specifications

      167
  • 8.3 Sleep States

    167
  • 8.4 Intel® Turbo Boost Technology

    168
  • 8.5 Enhanced Intel SpeedStep® Technology

    168
• 9 Boxed Processor Specifications

  169
  • 9.1 Introduction

    169
    • 9.1.1 Available Boxed Thermal Solution Configurations

      169
    • 9.1.2 Intel Thermal Solution STS100C (Passive/Active Combination Heat Sink Solution)

      169
    • 9.1.3 Intel Thermal Solution STS100A (Active Heat Sink Solution)

      170
    • 9.1.4 Intel Thermal Solution STS100P (Boxed 25.5 mm Tall Passive Heat Sink Solution)

      171
  • 9.2 Mechanical Specifications

    171
    • 9.2.1 Boxed Processor Heat Sink Dimensions and Baseboard Keepout Zones

      172
    • 9.2.2 Boxed Processor Retention Mechanism and Heat Sink Support (URS)

      181
  • 9.3 Fan Power Supply [STS100C (Combo) and STS100A (Active) Solutions]

    182
    • 9.3.1 Boxed Processor Cooling Requirements

      183
  • 9.4 Boxed Processor Contents

    185