Intel D915GEVL ATX 915G DDR-533 LGA775 マニュアル

目次

• Intel® Desktop Boards D915GEV/D915GRF Technical Product Specification

  1
• Revision History / Disclaimer

  2
• Preface

  3
  • Intended Audience

    3
  • What This Document Contains

    3
  • Typographical Conventions

    3
  • Other Common Notation

    4
• Contents

  5
• 1 Product Description

  11
  • 1.1 PCI Bus Terminology Change

    11
  • 1.2 Overview

    12
    • 1.2.1 Feature Summary

      12
    • 1.2.2 Manufacturing Options

      13
    • 1.2.3 Board Layout

      14
    • 1.2.4 Block Diagram

      16
  • 1.3 Online Support

    17
  • 1.4 Processor

    17
  • 1.5 System Memory

    18
    • 1.5.1 Memory Configurations

      19
      • 1.5.1.1 Dual Channel (Interleaved) Mode Configurations

        20
      • 1.5.1.2 Single Channel (Asymmetric) Mode Configurations

        22
  • 1.6 Intel® 915G Chipset

    23
    • 1.6.1 Intel 915G Graphics Subsystem

      23
      • 1.6.1.1 Intel® GMA900 Graphics Controller

        23
      • 1.6.1.2 Dynamic Video Memory Technology (DVMT)

        24
      • 1.6.1.3 Advanced Digital Display 2 (ADD2) Card Support

        24
      • 1.6.1.4 Configuration Modes

        25
    • 1.6.2 USB

      25
    • 1.6.3 IDE Support

      25
      • 1.6.3.1 Parallel ATE IDE Interface

        25
      • 1.6.3.2 Serial ATA Interfaces

        26
      • 1.6.3.3 SCSI Hard Drive Activity LED Connector (Optional)

        27
    • 1.6.4 Real-Time Clock, CMOS SRAM, and Battery

      27
  • 1.7 PCI Express Connectors

    27
  • 1.8 I/O Controller

    28
    • 1.8.1 Serial Ports

      28
    • 1.8.2 Parallel Port

      28
    • 1.8.3 Diskette Drive Controller

      28
    • 1.8.4 Keyboard and Mouse Interface

      28
  • 1.9 Audio Subsystem

    29
    • 1.9.1 Audio Subsystem Software

      29
    • 1.9.2 Audio Connectors

      29
    • 1.9.3 Intel® High Definition Audio Subsystem

      30
  • 1.10 LAN Subsystem

    31
    • 1.10.1 10/100 Mbits/sec LAN Subsystem

      31
      • 1.10.1.1 Intel® 82562EZ Physical Layer Interface Device

        31
      • 1.10.1.2 RJ-45 LAN Connector with Integrated LEDs

        31
    • 1.10.2 Gigabit LAN Subsystem

      32
      • 1.10.2.1 Marvell Yukon 88E8050 PCI Express 1.0a Integrated MAC/PHY Gigabit Ethernet Controller

        32
      • 1.10.2.2 RJ-45 LAN Connector with Integrated LEDs

        32
    • 1.10.3 Alert Standard Format (ASF) Support

      33
    • 1.10.4 LAN Subsystem Software

      34
  • 1.11 Hardware Management Subsystem

    34
    • 1.11.1 Hardware Monitoring and Fan Control ASIC

      34
    • 1.11.2 Thermal Monitoring

      35
    • 1.11.3 Fan Monitoring

      36
    • 1.11.4 Chassis Intrusion and Detection

      36
  • 1.12 Power Management

    36
    • 1.12.1 ACPI

      37
      • 1.12.1.1 System States and Power States

        38
      • 1.12.1.2 Wake-up Devices and Events

        39
    • 1.12.2 Hardware Support

      39
      • 1.12.2.1 Power Connector

        40
      • 1.12.2.2 Fan Connectors

        40
      • 1.12.2.3 LAN Wake Capabilities

        40
      • 1.12.2.4 Instantly Available PC Technology

        41
      • 1.12.2.5 Resume on Ring

        41
      • 1.12.2.6 Wake from USB

        41
      • 1.12.2.7 Wake from PS/2 Devices

        41
      • 1.12.2.8 PME# Signal Wake-up Support

        41
      • 1.12.2.9 WAKE# Signal Wake-up Support

        42
      • 1.12.2.10 +5 V Standby Power Indicator LED

        42
  • 1.13 Trusted Platform Module

    43
    • 1.13.1 System Requirements

      43
    • 1.13.2 Warning of Potential Data Loss

      43
    • 1.13.3 Security Precautions

      44
      • 1.13.3.1 Password Procedures

        44
      • 1.13.3.2 Emergency Recovery File Back Up Procedures

        45
      • 1.13.3.3 Hard Drive Image Backup Procedures

        45
      • 1.13.3.4 Clear Text Backup (Optional)

        45
    • 1.13.4 Trusted Platform Module Ownership

      45
    • 1.13.5 Enabling the Trusted Platform Module

      46
    • 1.13.6 Assuming Trusted Platform Module Ownership

      46
    • 1.13.7 Recovery Procedures

      47
      • 1.13.7.1 Recovering from Hard Disk Failure

        47
      • 1.13.7.2 Recovering from Desktop Board or TPM Failure

        47
    • 1.13.8 Clearing Trusted Platform Module Ownership

      48
    • 1.13.9 Software Support

      49
• 2 Technical Reference

  51
  • 2.1 Introduction

    51
  • 2.2 Memory Resources

    51
    • 2.2.1 Addressable Memory

      51
    • 2.2.2 Memory Map

      53
  • 2.3 DMA Channels

    53
  • 2.4 Fixed I/O Map

    54
  • 2.5 PCI Configuration Space Map

    55
  • 2.6 Interrupts

    56
  • 2.7 PCI Conventional Interrupt Routing Map

    57
  • 2.8 Connectors

    59
    • 2.8.1 Back Panel Connectors

      60
    • 2.8.2 Component-side Connectors

      62
      • 2.8.2.1 Chassis Fan Connectors

        65
      • 2.8.2.2 Power Supply Connectors

        66
      • 2.8.2.3 Add-in Card Connectors

        67
      • 2.8.2.4 Auxiliary Front Panel Power/Sleep LED Connector

        68
      • 2.8.2.5 Front Panel Connector

        68
        • 2.8.2.5.1 Hard Drive Activity LED Connector [Yellow]

          69
        • 2.8.2.5.2 Reset Switch Connector [Purple]

          69
        • 2.8.2.5.3 Power/Sleep LED Connector [Green]

          69
        • 2.8.2.5.4 Power Switch Connector [Red]

          69
      • 2.8.2.6 Front Panel USB Connectors

        69
      • 2.8.2.7 Front Panel IEEE 1394a Connectors (Optional)

        70
  • 2.9 Jumper Block

    71
  • 2.10 Mechanical Considerations

    72
    • 2.10.1 Form Factor

      72
    • 2.10.2 I/O Shield

      73
  • 2.11 Electrical Considerations

    74
    • 2.11.1 DC Loading

      74
    • 2.11.2 Add-in Board Considerations

      74
    • 2.11.3 Fan Connector Current Capability

      74
    • 2.11.4 Power Supply Considerations

      75
  • 2.12 Thermal Considerations

    76
  • 2.13 Reliability

    78
  • 2.14 Environmental

    79
  • 2.15 Regulatory Compliance

    80
    • 2.15.1 Safety Regulations

      80
    • 2.15.2 EMC Regulations

      80
      • 2.15.2.1 FCC Compliance Statement (USA)

        81
      • 2.15.2.2 Canadian Compliance Statement

        81
    • 2.15.3 European Union Declaration of Conformity Statement

      81
    • 2.15.4 Product Ecology Statements

      82
      • 2.15.4.1 Disposal Considerations

        82
      • 2.15.4.2 Recycling Considerations

        82
    • 2.15.5 Product Certification Markings (Board Level)

      83
• 3 Overview of BIOS Features

  85
  • 3.1 Introduction

    85
  • 3.2 BIOS Flash Memory Organization

    86
  • 3.3 Resource Configuration

    86
    • 3.3.1 PCI Autoconfiguration

      86
    • 3.3.2 PCI IDE Support

      86
  • 3.4 System Management BIOS (SMBIOS)

    87
  • 3.5 Legacy USB Support

    87
  • 3.6 BIOS Updates

    88
    • 3.6.1 Language Support

      88
    • 3.6.2 Custom Splash Screen

      88
  • 3.7 Boot Options

    89
    • 3.7.1 CD-ROM Boot

      89
    • 3.7.2 Network Boot

      89
    • 3.7.3 Booting Without Attached Devices

      89
    • 3.7.4 Changing the Default Boot Device During POST

      89
  • 3.8 Fast Booting Systems with Intel® Rapid BIOS Boot

    90
    • 3.8.1 Peripheral Selection and Configuration

      90
    • 3.8.2 Intel Rapid BIOS Boot

      90
  • 3.9 BIOS Security Features

    91
• 4 Error Messages and Beep Codes

  93
  • 4.1 BIOS Error Messages

    93
  • 4.2 Port 80h POST Codes

    95
  • 4.3 Bus Initialization Checkpoints

    99
  • 4.4 Speaker

    100
  • 4.5 BIOS Beep Codes

    100