Intel S2400GP4 マニュアル

目次

• 1. Introduction

  1
• Chapter Outline

  1
• Server Board Use Disclaimer

  1
• 2. Overview

  2
• Intel® Server Boards S2400GP Feature Set

  2
• Table 1. Intel® Server Boards S2400GP Feature Set

  2
• Server Board Layout

  4
• Server Board Connector and Component Layout

  4
• Figure 1. Intel® Server Board S2400GP Layout (S2400GP4 as example)

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• Figure 2. Intel® Server Board S2400GP Components

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• Table 2. Intel® Server Boards S2400GP Components

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• Server Board Mechanical Drawings

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• Figure 3. Major Board Components

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• Figure 4. Intel® Server Board S2400GP – Mounting Hole Locations (1 of 2)

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• Figure 5. Intel® Server Board S2400GP – Mounting Hole Locations (2 of 2)

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• Figure 6. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (1 of 3)

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• Figure 7. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (2 of 3)

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• Figure 8. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (2 of 3)

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• Figure 9. Intel® Server Boards S2400GP – Primary Side Keep-out Zone

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• Figure 10. Intel® Server Boards S2400GP – Primary Side Card Side Keep-out Zone

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• Server Board Rear I/O Layout

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• Figure 11. Intel® Server Boards S2400GP – Second Side Keep-out Zone

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• Figure 12. Intel® Server Boards S2400GP Rear I/O Layout

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• 3. Functional Architecture

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• Processor Support

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• Figure 13. Intel® Server Board S2400GP Functional Block Diagram

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• Processor Socket Assembly

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• Processor Population rules

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• Figure 14. Processor Socket Assembly

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• Table 3. Mixed Processor Configurations

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• Processor Function Overview

  22
• Intel® QuickPath Interconnect

  23
• Integrated Memory Controller (IMC) and Memory Subsystem

  23
• 3.6.1 Supported Memory

  24
• Table 4. UDIMM Support Guidelines

  24
• Table 5. RDIMM Support Guidelines

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• Table 6. LRDIMM Support Guidelines

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• 3.6.2 Memory population rules

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• Table 7. Intel® Server Board S2400GP DIMM Nomenclature

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• Figure 15. Intel® Server Board S2400GP DIMM Slot Layout

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• 3.6.3 Publishing System Memory

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• 3.6.4 RAS Features

  29
• Processor Integrated I/O Module (IIO)

  33
• 3.7.1 Network Interface

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• Figure 16. Functional Block Diagram of Processor IIO Sub-system

  34
• Intel® C600-A Chipset Functional Overview

  35
• Table 8. External RJ45 NIC Port LED Definition

  35
• Figure 17. Functional Block Diagram – Chipset Supported Features and Functions

  36
• 3.8.1 Digital Media Interface (DMI)

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• 3.8.2 PCI Express* Interface

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• 3.8.3 Serial ATA (SATA) Controller

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• 3.8.4 AHCI

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• 3.8.5 Rapid Storage Technology

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• 3.8.6 PCI Interface

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• 3.8.7 Low Pin Count (LPC) Interface

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• 3.8.8 Serial Peripheral Interface (SPI)

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• 3.8.9 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)

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• 3.8.10 Advanced Programmable Interrupt Controller (APIC)

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• 3.8.11 Universal Serial Bus (USB) Controller

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• 3.8.12 Gigabit Ethernet Controller

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• 3.8.13 RTC

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• 3.8.14 GPIO

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• 3.8.15 Enhanced Power Management

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• 3.8.16 Manageability

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• 3.8.17 System Management Bus (SMBus* 2.0)

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• 3.8.18 Intel® Active Management Technology (Intel® AMT)

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• 3.8.19 Integrated NVSRAM Controller

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• 3.8.20 Intel® Virtualization Technology for Direct I/O (Intel® VT-d)

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• 3.8.21 JTAG Boundary-Scan

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• 3.8.22 KVM/Serial Over LAN (SOL) Function

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• Table 9. Intel® RAID C600 Upgrade Key Options

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• 3.8.24 Intel® Embedded Server RAID Technology 2 (ESRT2)

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• 3.8.25 Intel® Rapid Storage Technology (RSTe)

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• Figure 18. Integrated Baseboard Management Controller (BMC) Overview

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• Super I/O Controller

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• 3.10.1 Keyboard and Mouse Support

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• 3.10.2 Wake-up Control

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• Graphics Controller and Video Support

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• Figure 19. Integrated BMC Hardware

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• Table 10. Video Modes

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• Baseboard Management Controller

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• Table 11. Video mode

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• 3.12.1 Remote KVMS Support

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• 3.12.2 Integrated BMC Embedded LAN Channel

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• 4 System Security

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• BIOS Password Protection

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• Trusted Platform Module (TPM) Support

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• TPM security BIOS

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• 4.3.1 Physical Presence

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• 4.3.2 TPM Security Setup Options

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• 4.3.3 Security Screen

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• Figure 20. Setup Utility – TPM Configuration Screen

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• Intel® Trusted Execution Technology

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• Table 12. TPM Setup Utility – Security Configuration Screen Fields

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• 5 Technology Support

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• Intel® Trusted Execution Technology

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• Intel® Virtualization Technology – Intel® VT-x/VT-d/VT-c

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• Intel® Intelligent Power Node Manager

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• Table 13. Intel® Intelligent Power Node Manager

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• 5.3.1 Hardware Requirements

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• 6 Platform Management Functional Overview

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• Baseboard Management Controller (BMC) Firmware Feature Support

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• 6.1.1 IPMI 2.0 Features

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• 6.1.2 Non IPMI Features

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• 6.1.3 New Manageability Features

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• Basic and Advanced Features

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• Table 14. Basic and Advanced Features

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• Integrated BMC Hardware: Emulex* Pilot III

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• 6.3.1 Emulex* Pilot III Baseboard Management Controller Functionality

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• Advanced Configuration and Power Interface (ACPI)

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• Table 15. ACPI Power States

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• Power Control Sources

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• BMC Watchdog

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• Table 16. Power Control Initiators

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• Fault Resilient Booting (FRB)

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• Sensor Monitoring

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• Field Replaceable Unit (FRU) Inventory Device

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• System Event Log (SEL)

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• System Fan Management

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• 6.11.1 Thermal and Acoustic Management

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• 6.11.2 Fan Profiles

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• Table 17. Fan Profiles

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• 6.11.3 Thermal Sensor Input to Fan Speed Control

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• 6.11.4 Memory Thermal Throttling

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• Figure 21. Fan Speed Control Process

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• Messaging Interfaces

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• 6.12.1 User Model

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• 6.12.2 IPMB Communication Interface

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• Table 18. Messaging Interfaces

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• 6.12.3 LAN Interface

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• 6.12.4 Address Resolution Protocol (ARP)

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• 6.12.5 Internet Control Message Protocol (ICMP)

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• 6.12.6 Virtual Local Area Network (VLAN)

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• 6.12.7 Secure Shell (SSH)

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• 6.12.8 Serial-over-LAN (SOL 2.0)

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• 6.12.9 Platform Event Filter (PEF)

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• Table 19. Factory Configured PEF Table Entries

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• 6.12.10 LAN Alerting

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• 6.12.11 Alert Policy Table

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• 6.12.12 SM-CLP (SM-CLP Lite)

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• 6.12.13 Embedded Web Server

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• 6.12.14 Virtual Front Panel

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• 6.12.15 Embedded Platform Debug

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• 6.12.16 Data Center Management Interface (DCMI)

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• 6.12.17 Lightweight Directory Authentication Protocol (LDAP)

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• Table 20. Diagnostic Data

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• 7 Advanced Management Feature Support (RMM4)

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• Figure 22. Intel® RMM4 Lite Activation Key Installation

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• Table 22. RMM4 Option Kits

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• Keyboard, Video, Mouse (KVM) Redirection

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• Figure 23. Intel® RMM4 Dedicated Management NIC Installation

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• Remote Console

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• Performance

  90
• Security

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• Availability

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• Usage

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• Force-enter BIOS Setup

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• Media Redirection

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• Availability

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• Network Port Usage

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• 8 On-board Connector/Header Overview

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• Board Connector Information

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• Table 23. Board Connector Matrix

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• Power Connectors

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• Table 24. Main Power Connector Pin-out

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• Table 25. CPU 1/CPU 2 Power Connector Pin-out

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• System Management Headers

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• Intel® Remote Management Module 4 Connector

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• Table 26. Power Supply Auxiliary Signal Connector Pin-out

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• Table 27. Intel® RMM4 Connector Pin-out

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• TPM connector

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• LCP Header

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• HSBP Header

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• SGPIO Header

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• Table 28. Intel® RMM4 – Lite Connector Pin-out

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• Table 29. TPM connector Pin-out

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• Table 30. LCP Header Pin-out

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• Table 31. HSBP_I2C Header Pin-out

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• Table 32. SGPIO Header Pin-out

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• Front Panel Connector

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• I/O Connectors

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• VGA Connector

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• NIC Connectors

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• Table 33. Front Panel SSI Standard 30-pin Connector Pin-out

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• Table 34. VGA Connector Pin-out

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• SATA Connectors

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• Serial Port Connectors

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• Table 35. RJ-45 10/100/1000 NIC Connector Pin-out

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• Table 36. SATA, MiniSAS SCU-0 and SCU-1 Connector Pin-out

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• Table 37. External DB9 Serial A Port Pin-out

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• Table 38. Internal 9-pin Serial B Header Pin-out

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• USB Connector

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• Table 39. External USB Connector Pin-out

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• Table 40. Internal USB Connector Pin-out

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• Table 41. Pin-out of Internal Low-Profile USB Connector for Solid State Drive

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• Fan Headers

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• Table 42. Internal Type A USB Port Pin-out

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• Table 43. SSI 4-pin Fan Header Pin-out

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• Table 44. SSI 6-pin Fan Header Pin-out

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• 9 Jumper Blocks

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• Figure 24. Jumper Blocks (J1C2, J1C5, J1E2, J2H3, J3H3, J3H4, J3H5, J3H6)

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• Table 45. Server Board Jumpers (J1C2, J1E2, J1E4, J1E5, J1H1)

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• BIOS Default (CMOS Clear) and Password Clear Usage Procedure

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• Clearing CMOS (BIOS default)

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• Clearing the Password

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• Force BMC Update Procedure

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• ME Force Update Jumper

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• BIOS Recovery Jumper

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• 10 Intel Light Guided Diagnostics

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• 5 V Stand-by LED

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• Figure 25. 5 V Stand-by Status LED Location

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• Fan Fault LEDs

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• CPU Fault LEDs

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• Figure 26. Fan Fault LED Locations

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• System Status LED

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• Figure 27. CPU Fault LED Locations

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• Figure 28. System Status LED Location

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• Table 46. System Status LED

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• DIMM Fault LEDs

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• Post Code Diagnostic LEDs

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• Figure 29. DIMM Fault LEDs Location

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• Table 47. BMC Boot/Reset Status LED Indicators

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• Figure 30. POST Code Diagnostic LED Locations

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• 11 Environmental Limits Specification

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• Processor Thermal Design Power (TDP) Support

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• Table 48. Server Board Design Specifications

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• MTBF

  118
• Server Board Power Distribution

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• Table 49. MTBF Estimate

  118
• Figure 31. Power Distribution Block Diagram

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• Appendix A: Integration and Usage Tips

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• Appendix B: BMC Sensor Tables

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• Table 50. Integrated BMC Core Sensors

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• Appendix C: POST Code Diagnostic LED Decoder

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• Figure 32. POST Code Diagnostic LEDs

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• Table 51. POST Progress Code LED Example

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• Table 52. POST Progress Codes

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• Table 53. MRC Progress Codes

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• Table 54. POST Progress LED Codes

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• Appendix D: POST Code Errors

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• Table 55. POST Error Codes and Messages

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• Table 56. POST Error Beep Codes

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• Table 57. Integrated BMC Beep Codes

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• Appendix E: Supported Intel® Server Chassis

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• Table 58. Intel® Server Chassis P4000M family

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• Glossary

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• Reference Documents

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