Microchip Technology MCP6S26-I/P Linear IC PDIP-14 マニュアル

目次

• 1.0 Electrical Characteristics

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  • DC characteristics

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  • AC characteristics

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  • FIGURE 1-1: Channel Select Timing Diagram.

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  • FIGURE 1-2: PGA Shutdown timing diagram (must enter correct commands before CS goes high).

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  • FIGURE 1-3: Gain Select Timing Diagram.

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  • FIGURE 1-4: POR power-up and power- down timing diagram.

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  • FIGURE 1-5: Detailed SPI Serial Interface Timing, SPI 0,0 mode.

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  • FIGURE 1-6: Detailed SPI Serial Interface Timing, SPI 1,1 mode.

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  • 1.1 DC Output Voltage Specs / Model

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    • FIGURE 1-7: Output Voltage Model with the standard condition VREF = VSS = 0V.

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    • FIGURE 1-8: Output Voltage INL with the standard condition VREF = VSS = 0V.

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• 2.0 Typical Performance Curves

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  • FIGURE 2-1: DC Gain Error, G = +1.

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  • FIGURE 2-2: DC Gain Error, G ³+2.

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  • FIGURE 2-3: Ladder Resistance Drift.

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  • FIGURE 2-4: DC Gain Drift, G = +1.

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  • FIGURE 2-5: DC Gain Drift, G ³+2.

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  • FIGURE 2-6: Input Offset Voltage, VDD = 4.0V.

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  • FIGURE 2-7: Input Offset Voltage vs. VREF Voltage.

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  • FIGURE 2-8: DC Output Non-Linearity vs. Supply Voltage.

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  • FIGURE 2-9: Input Noise Voltage Density vs. Frequency.

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  • FIGURE 2-10: Input Offset Voltage Drift.

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  • FIGURE 2-11: DC Output Non-Linearity vs. Output Swing.

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  • FIGURE 2-12: Input Noise Voltage Density vs. Gain.

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  • FIGURE 2-13: PSRR vs. Ambient Temperature.

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  • FIGURE 2-14: Input Bias Current vs. Ambient Temperature.

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  • FIGURE 2-15: Bandwidth vs. Capacitive Load.

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  • FIGURE 2-16: PSRR vs. Frequency.

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  • FIGURE 2-17: Input Bias Current vs. Input Voltage.

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  • FIGURE 2-18: Gain Peaking vs. Capacitive Load.

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  • FIGURE 2-19: Gain vs. Frequency.

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  • FIGURE 2-20: Histogram of Quiescent Current in Shutdown Mode.

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  • FIGURE 2-21: Output Voltage Headroom vs. Output Current.

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  • FIGURE 2-22: Quiescent Current vs. Supply Voltage.

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  • FIGURE 2-23: Quiescent Current in Shutdown Mode vs. Ambient Temperature.

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  • FIGURE 2-24: Output Short Circuit Current vs. Supply Voltage.

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  • FIGURE 2-25: THD plus Noise vs. Frequency, VOUT = 2 VP-P.

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  • FIGURE 2-26: Small Signal Pulse Response.

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  • FIGURE 2-27: Channel Select Timing.

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  • FIGURE 2-28: THD plus Noise vs. Frequency, VOUT = 4 VP-P.

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  • FIGURE 2-29: Large Signal Pulse Response.

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  • FIGURE 2-30: Gain Select Timing.

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  • FIGURE 2-31: Output Voltage vs. Shutdown Mode.

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  • FIGURE 2-32: POR Trip Voltage.

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  • FIGURE 2-33: Output Voltage Swing vs. Frequency.

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  • FIGURE 2-34: The MCP6S21/2/6/8 family shows no phase reversal under overdrive.

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• 3.0 Pin Descriptions

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  • TABLE 3-1: Pin Function Table

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  • 3.1 Analog Output

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  • 3.2 Analog Inputs (CH0 thru CH7)

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  • 3.3 External Reference Voltage (VREF)

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  • 3.4 Power Supply (VSS and VDD)

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  • 3.5 Digital Inputs

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  • 3.6 Digital Output

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• 4.0 Analog Functions

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  • FIGURE 4-1: PGA Block Diagram.

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  • 4.1 Input MUX

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  • 4.2 Internal Op Amp

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    • TABLE 4-1: GAIN VS. internal Compensation Capacitor

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    • FIGURE 4-2: RIN limits the current flow into an input pin.

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  • 4.3 Resistor Ladder

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  • 4.4 Shutdown Mode

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• 5.0 Digital Functions

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  • 5.1 SPI Timing

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    • FIGURE 5-1: Serial bus sequence for the PGA; SPI 0,0 mode (see Figure 1-5).

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    • FIGURE 5-2: Serial bus sequence for the PGA; SPI 1,1 mode (see Figure 1-6).

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  • 5.2 Registers

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  • 5.3 Daisy Chain Configuration

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    • FIGURE 5-3: Daisy Chain Configuration.

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    • FIGURE 5-4: Serial bus sequence for daisy-chain configuration; SPI 0,0 mode.

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    • FIGURE 5-5: Serial bus sequence for daisy-chain configuration; SPI 1,1 mode.

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  • 5.4 Power-On Reset

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• 6.0 Applications Information

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  • 6.1 Changing External Reference Voltage

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    • FIGURE 6-1: PGA with Different External Reference Voltage.

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  • 6.2 Capacitive Load and Stability

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    • FIGURE 6-2: PGA Circuit for Large Capacitive Loads.

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  • 6.3 Layout Considerations

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  • 6.4 Typical Applications

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    • FIGURE 6-3: Wide Dynamic Range Current Measurement Circuit.

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    • FIGURE 6-4: PGA with Modified Gain Range.

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    • FIGURE 6-5: PGA with lower gain range.

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    • FIGURE 6-6: PGA with Extended Gain Range.

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    • FIGURE 6-7: PGA with Multiple Sensor Inputs.

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    • FIGURE 6-8: PGA with Expanded Inputs.

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    • FIGURE 6-9: Expanded Input for a PIC® Microcontroller.

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    • FIGURE 6-10: PGA as an ADC Driver.

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• 7.0 Packaging Information

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  • 7.1 Package Marking Information

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