Motorola CPCI-6115 マニュアル

目次

• CPCI-6115 CompactPCI Single Board Computer

  1
• Contents

  3
• List of Tables

  9
• List of Figures

  11
• About this Manual

  13
  • Overview of Contents

    13
  • Abbreviations

    14
  • Conventions

    16
  • Summary of Changes

    17
  • Comments and Suggestions

    18
• Safety Notes

  19
• Sicherheitshinweise

  23
• Introduction

  27
  • 1.1 Features

    27
  • 1.2 Standard Compliances

    28
  • 1.3 Ordering Information

    29
• Hardware Preparation and Installation

  31
  • 2.1 Overview

    31
  • 2.2 Unpacking and Inspecting the Board

    31
  • 2.3 Environmental, Power, and Thermal Requirements

    32
    • 2.3.1 Environmental Requirements

      32
    • 2.3.2 Power Requirements

      34
    • 2.3.3 Thermal Requirements

      34
  • 2.4 Getting Started

    37
    • 2.4.1 Overview of Start-up Procedure

      37
    • 2.4.2 Equipment Required

      38
  • 2.5 Baseboard Preparation

    38
    • 2.5.1 Configuring the Hardware

      38
    • 2.5.2 Setting Switches and Jumpers

      39
    • 2.5.3 J6, Bus Mode Selection

      40
    • 2.5.4 J9, Standalone Operating Mode

      41
    • 2.5.5 J10, Flash Bank Selection

      41
    • 2.5.6 J15, +/-12 V Present Header

      42
    • 2.5.7 J20, Safe Start Header

      42
    • 2.5.8 J25, SROM Initialization Enable Header

      43
    • 2.5.9 J99, Flash Bank A Programming Enable Header

      43
    • 2.5.10 SW2, Geographic Address

      44
  • 2.6 Operating Modes

    44
  • 2.7 Installing Hardware

    44
    • 2.7.1 Installing PMC Modules on the CPCI-6115

      45
    • 2.7.2 Installing the CPCI-6115 Baseboard

      48
  • 2.8 Connecting to a Console Port

    49
  • 2.9 Applying Power

    49
• Controls, LEDs, and Connectors

  51
  • 3.1 Overview

    51
  • 3.2 Board Layout

    52
  • 3.3 Front Panel Connectors and LEDs

    52
  • 3.4 ABORT/Reset Switch

    54
  • 3.5 On-Board Connectors and Headers

    54
    • 3.5.1 J19, Front Panel Asynchronous Serial Port

      54
    • 3.5.2 J95, Front Panel 10/100/1000 Megabits/s Ethernet Connector

      55
    • 3.5.3 CompactPCI J1/J2 Connectors

      55
    • 3.5.4 CompactPCI Bus Connector

      56
    • 3.5.5 CompactPCI Bus Connector

      56
    • 3.5.6 CompactPCI User I/O Connector

      57
    • 3.5.7 CompactPCI Connector

      58
    • 3.5.8 CompactPCI User I/O Connector

      59
    • 3.5.9 PCI Mezzanine Card (PMC) Connectors

      61
    • 3.5.10 Boundary Scan JTAG Header

      65
    • 3.5.11 Processor JTAG/COP Header

      65
    • 3.5.12 Stand-Alone Operation Select Header

      66
    • 3.5.13 Flash Boot Bank Select Header

      66
    • 3.5.14 Safe Start Header

      67
    • 3.5.15 Bus Mode Select Header

      67
    • 3.5.16 SROM Initialization Enable Header

      67
    • 3.5.17 Flash Bank A Write Protect Header

      68
    • 3.5.18 +/-12 V Present Header

      68
• Functional Description

  69
  • 4.1 Overview

    69
  • 4.2 Block Diagram

    70
  • 4.3 General Description

    71
    • 4.3.1 Processor Bus Resources

      71
    • 4.3.2 Processor

      72
    • 4.3.3 L3 Cache

      72
    • 4.3.4 MV64360 System Controller

      72
      • 4.3.4.1 MV64360 CPU Bus Interface

        73
      • 4.3.4.2 MV64360 DDR SDRAM Interface

        73
      • 4.3.4.3 MV64360 32-bit Interface to Devices

        74
      • 4.3.4.4 MV64360 Dual PCI/PCI-X Interfaces

        74
      • 4.3.4.5 MV64360 Integrated Gigabit Ethernet MACs

        74
      • 4.3.4.6 MV64360 Integrated 2 Megabit SRAM

        75
      • 4.3.4.7 MV64360 General-Purpose 32-bit Timer/Counters

        75
      • 4.3.4.8 MV64360 Watchdog Timer

        75
      • 4.3.4.9 MV64360 I2O Message Unit

        75
      • 4.3.4.10 MV64360 Four-Channel Independent DMA Controller

        75
      • 4.3.4.11 MV64360 I2C Interface

        75
      • 4.3.4.12 Interrupt Controller

        76
      • 4.3.4.13 PCI Bus Arbitration

        76
      • 4.3.4.14 Board Reset Logic

        77
      • 4.3.4.15 MV64360 MPP Configuration

        77
      • 4.3.4.16 MV64360 Reset Configuration

        78
    • 4.3.5 System Memory

      81
    • 4.3.6 Flash Memory

      82
    • 4.3.7 NVRAM, Real-Time Clock, Watchdog Timer

      82
    • 4.3.8 TL16C550C UART Devices

      83
    • 4.3.9 System Registers

      83
    • 4.3.10 Serial EEPROM Devices

      83
    • 4.3.11 PCI Bus 0.0

      83
    • 4.3.12 PCI Bus 1.0

      83
    • 4.3.13 IDE Controller

      84
    • 4.3.14 Intel 21555 PCI-to-PCI Bridge

      84
    • 4.3.15 CompactPCI Bus

      84
    • 4.3.16 PMC Slots

      84
  • 4.4 Miscellaneous

    86
    • 4.4.1 Clock Generation

      86
    • 4.4.2 Interrupt Handling

      86
      • 4.4.2.1 MV64360 Interrupt Controller

        87
      • 4.4.2.2 Sources of Reset

        88
      • 4.4.2.3 Machine Check

        88
      • 4.4.2.4 Soft Reset

        88
      • 4.4.2.5 SMI

        88
      • 4.4.2.6 Other Software Considerations

        88
    • 4.4.3 Onboard Power Supplies

      89
    • 4.4.4 Hot Swap Support

      89
    • 4.4.5 Hot Swap Process

      89
    • 4.4.6 Intel 21555 Hot Swap Support

      89
• 5 Transition Module Preparation and Installation

  91
  • 5.1 Overview

    91
  • 5.2 Block Diagram

    92
  • 5.3 Preparing the Transition Module

    93
  • 5.4 Rear Panel Connectors

    94
  • 5.5 On-Board Connectors and Headers

    94
    • 5.5.1 IDE CompactFlash Connector

      95
    • 5.5.2 PMC I/O Module Connectors

      95
      • 5.5.2.1 Host IO Connectors

        96
      • 5.5.2.2 PMC I/O Connectors

        98
    • 5.5.3 CompactPCI User I/O Connector

      99
    • 5.5.4 CompactPCI User I/O Connector

      100
    • 5.5.5 10/100/1000BaseTx Connectors

      102
    • 5.5.6 COM1 And COM2 Connectors (MXP Version)

      102
    • 5.5.7 RJ-45 to DB-9 Adapter for COM1 to PC COM1

      103
  • 5.6 Jumper Settings

    104
    • 5.6.1 CompactFlash Jumper

      104
    • 5.6.2 COM1 and COM2 Asynchronous Serial Ports Jumpers

      104
  • 5.7 Functional Description

    105
    • 5.7.1 IDE Flash

      105
    • 5.7.2 Ethernet Interface (CompactPCI Version)

      106
    • 5.7.3 Hot-Swap Support

      106
    • 5.7.4 Serial EEPROM

      106
    • 5.7.5 PMC I/O Modules

      106
    • 5.7.6 Asynchronous Serial Ports

      106
      • 5.7.6.1 I/O Signal Multiplexing (IOMX)

        107
      • 5.7.6.2 Serial Port Redirection

        109
      • 5.7.6.3 Asynchronous Serial Port Diagrams

        109
      • 5.7.6.4 Port Configuration Diagrams

        110
    • 5.7.7 PMC I/O Module

      110
    • 5.7.8 PMC I/O Module Form Factor

      111
    • 5.7.9 PMC I/O Connector

      112
    • 5.7.10 Host I/O Connector

      112
    • 5.7.11 PMC I/O Module Presence Detection and Identification

      112
  • 5.8 Installing the PIM

    113
  • 5.9 Installing the Transition Module

    115
  • 5.10 Removing the Transition Module in a Hot-Swap Chassis

    116
• Remote Start via the PCI Bus

  117
  • 6.1 Overview

    117
  • 6.2 Register Description

    117
  • 6.3 Command/Response Register Description

    118
• MOTLoad Firmware

  119
  • 7.1 Overview

    119
  • 7.2 MOTLoad Description

    119
  • 7.3 MOTLoad Implementation and Memory Requirements

    119
  • 7.4 MOTLoad Commands

    120
  • 7.5 MOTLoad Utility Applications

    120
  • 7.6 MOTLoad Tests

    120
  • 7.7 Using MOTLoad

    121
    • 7.7.1 Command Line Interface

      121
    • 7.7.2 Command Line Help

      122
    • 7.7.3 Command Line Rules

      122
  • 7.8 MOTLoad Command List

    123
• Memory Maps

  127
  • 8.1 Overview

    127
  • 8.2 Memory Maps

    127
    • 8.2.1 Default Processor Memory Map

      127
    • 8.2.2 Processor Memory Map

      128
    • 8.2.3 Default PCI Memory Map

      129
    • 8.2.4 Suggested PCI Memory Map

      130
    • 8.2.5 System I/O Memory Map

      131
    • 8.2.6 PCI Local Bus Memory Map

      131
    • 8.2.7 CompactPCI Memory Map

      131
    • 8.2.8 Address Decoding with the 21555

      132
    • 8.2.9 L1, L2 and L3 Cache

      132
    • 8.2.10 System Memory

      132
• A Related Documentation

  133
  • A.1 Embedded Communications Computing Documents

    133
  • A.2 Manufacturers’ Documents

    133
  • A.3 Related Specifications

    134
• Index

  137