ユーザーズマニュアル目次1. General description12. Features12.1 General features12.2 DSP features22.3 Audio data input interface format support23. Applications24. Quick reference data35. Ordering information46. Block diagram57. Pinning information67.1 Pinning68. Functional description88.1 General88.2 Functional modes98.2.1 Control modes98.2.2 Key operating modes98.2.3 I2S master/slave modes and MCLK/BCK clock modes108.3 Power-up/power-down138.3.1 Power-up138.3.2 Power-down148.4 Digital audio data input148.4.1 Digital audio data format support148.4.2 Digital audio data format control168.5 Digital signal-processing features168.5.1 Equalizer168.5.1.1 Equalizer options168.5.1.2 Equalizer band function168.5.1.3 Equalizer band control188.5.2 Digital volume control208.5.3 Soft mute and mute218.5.4 Output signal and word-select polarity control218.5.5 Gain boost and clip level control218.5.6 Output power limiter228.5.7 PWM control for performance improvement228.6 Class-D amplification238.7 Protection mechanisms238.7.1 Thermal foldback248.7.2 Overtemperature protection248.7.3 Overcurrent protection248.7.4 Overvoltage protection248.7.5 Undervoltage protections248.7.6 Overdissipation protection258.7.7 Window protection258.7.8 Lock protection258.7.9 Underfrequency protection258.7.10 Overfrequency protection258.7.11 Invalid BCK protection268.7.12 DC blocking268.7.13 Overview protections269. I2C bus interface and register settings279.1 I2C bus interface279.2 I2C bus TFA9812 device addresses279.3 I2C write cycle description289.4 I2C read cycle description289.5 Top-level register map299.5.1 Interpolator settings and soft mute319.5.2 Volume control319.5.3 Digital input format329.5.4 Equalizer configuration329.5.5 Equalizer settings339.5.6 PWM signal control359.5.7 Digital-in clock configuration369.5.8 Thermal foldback control369.5.9 TFA9812 temperature379.5.10 Miscellaneous status379.6 Overview of functional control in each control mode3810. Internal circuitry3911. Limiting values4212. Thermal characteristics4313. Characteristics4413.1 DC Characteristics4413.2 AC characteristics4713.3 Timing4814. Application information4914.1 Output power estimation4914.2 Output current limiting5014.3 Speaker configuration and impedance5114.4 Typical application schematics5114.4.1 I2S slave mode and Legacy control mode5214.4.2 I2S slave mode and I2C control mode5314.4.3 I2S master mode and Legacy control mode5414.4.4 I2S master mode and I2C control mode5514.5 Curves measured in typical application5615. Package outline6116. Handling information6217. Revision history6318. Legal information6418.1 Data sheet status6418.2 Definitions6418.3 Disclaimers6418.4 Trademarks6419. Contact information6420. Contents65サイズ： 396KBページ数： 66Language: Englishマニュアルを開く
ユーザーズマニュアル目次1. General description12. Features12.1 General features12.2 DSP features22.3 Audio data input interface format support23. Applications24. Quick reference data35. Ordering information46. Block diagram57. Pinning information67.1 Pinning68. Functional description88.1 General88.2 Functional modes98.2.1 Control modes98.2.2 Key operating modes98.2.3 I2S master/slave modes and MCLK/BCK clock modes108.3 Power-up/power-down138.3.1 Power-up138.3.2 Power-down148.4 Digital audio data input148.4.1 Digital audio data format support148.4.2 Digital audio data format control168.5 Digital signal-processing features168.5.1 Equalizer168.5.1.1 Equalizer options168.5.1.2 Equalizer band function168.5.1.3 Equalizer band control188.5.2 Digital volume control208.5.3 Soft mute and mute218.5.4 Output signal and word-select polarity control218.5.5 Gain boost and clip level control218.5.6 Output power limiter228.5.7 PWM control for performance improvement228.6 Class-D amplification238.7 Protection mechanisms238.7.1 Thermal foldback248.7.2 Overtemperature protection248.7.3 Overcurrent protection248.7.4 Overvoltage protection248.7.5 Undervoltage protections248.7.6 Overdissipation protection258.7.7 Window protection258.7.8 Lock protection258.7.9 Underfrequency protection258.7.10 Overfrequency protection258.7.11 Invalid BCK protection268.7.12 DC blocking268.7.13 Overview protections269. I2C bus interface and register settings279.1 I2C bus interface279.2 I2C bus TFA9812 device addresses279.3 I2C write cycle description289.4 I2C read cycle description289.5 Top-level register map299.5.1 Interpolator settings and soft mute319.5.2 Volume control319.5.3 Digital input format329.5.4 Equalizer configuration329.5.5 Equalizer settings339.5.6 PWM signal control359.5.7 Digital-in clock configuration369.5.8 Thermal foldback control369.5.9 TFA9812 temperature379.5.10 Miscellaneous status379.6 Overview of functional control in each control mode3810. Internal circuitry3911. Limiting values4212. Thermal characteristics4313. Characteristics4413.1 DC Characteristics4413.2 AC characteristics4713.3 Timing4814. Application information4914.1 Output power estimation4914.2 Output current limiting5014.3 Speaker configuration and impedance5114.4 Typical application schematics5114.4.1 I2S slave mode and Legacy control mode5214.4.2 I2S slave mode and I2C control mode5314.4.3 I2S master mode and Legacy control mode5414.4.4 I2S master mode and I2C control mode5514.5 Curves measured in typical application5615. Package outline6116. Handling information6217. Revision history6318. Legal information6418.1 Data sheet status6418.2 Definitions6418.3 Disclaimers6418.4 Trademarks6419. Contact information6420. Contents65サイズ： 396KBページ数： 66Language: Englishマニュアルを開く
