Omega Engineering OME-PIO-D96 マニュアル

目次

• 1. Introduction

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  • 1.1 Features

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  • 1.2 Specifications

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  • 1.3 Order Description

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    • 1.3.1 Options

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  • 1.4 PCI Data Acquisition Family

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  • 1.5 Product Check List

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• 2. Hardware configuration

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  • 2.1 Board Layout

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  • 2.2 I/O port Location

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  • 2.3 Enable I/O Operation

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  • 2.4 D/I/O Architecture

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  • 2.5 Interrupt Operation

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    • 2.5.1 Interrupt Block Diagram of OME-PIO-D96

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    • 2.5.2 INT_CHAN_0/1/2/3

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    • 2.5.3 Initial_high, active_low Interrupt source

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    • 2.5.4 Initial_low, active_high Interrupt source

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    • 2.4.5 Muliti Interrupt Source

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  • 2.6 Daughter Boards

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    • 2.6.1 OME-DB-37

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    • 2.6.2 OME-DN-37 & OME-DN-50

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    • 2.6.3 OME-DB-8125

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    • 2.6.4 OME-ADP-37/PCI & OME-ADP-50/PCI

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    • 2.6.5 OME-DB-24P/24PD Isolated Input Board

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    • 2.6.6 OME-DB-24R/24RD Relay Board

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    • 2.6.7 OME-DB-24PR/24POR/24C

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    • 2.6.8 Daughter Boards Comparison Table

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  • 2.7 Pin Assignment

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• 3. I/O Control Register

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  • 3.1 How to Find the I/O Address

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    • 3.1.1 PIO_DriverInit

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    • 3.1.2 PIO_GetConfigAddressSpace

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    • 3.1.3 Show_PIO_PISO

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  • 3.2 The Assignment of I/O Address

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  • 3.3 The I/O Address Map

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    • 3.3.1 RESET\ Control Register

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    • 3.3.2 AUX Control Register

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    • 3.3.3 AUX data Register

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    • 3.3.4 INT Mask Control Register

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    • 3.3.5 Aux Status Register

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    • 3.3.6 Interrupt Polarity Control Register

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    • 3.3.7 I/O Selection Control Register

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    • 3.3.8 Read/Write 8-bit data Register

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• 4. Demo program

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  • 4.1 PIO_PISO

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    • 4.1.1 PIO_PISO.EXE for Windows

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  • 4.2 DEMO1

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  • 4.3 DEMO2

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  • 4.4 DEMO3

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  • 4.5 DEMO4

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  • 4.6 DEMO5

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