Intel Xeon L7455 AD80582JH046003 데이터 시트

Intel® Xeon® Processor 7400 Series Datasheet

115

Details on each of these sections are described below. 

Reserved fields or bits SHOULD be programmed to zeros. However, OEMs should not 

rely on this model.

To maintain backward compatibility, the Header defines the starting address for each 
subsequent section of the PIROM. Software should check for the offset before reading 
data from a particular section of the ROM. 

Example: Code looking for the cache data of a processor would read offset 05h to find 
a value of 25h. 25h is the first address within the 'Cache Data' section of the PIROM.

70h

8

Reserved

Reserved

71 - 72h

16

Reserved

Reserved

73h

8

Checksum

1 byte checksum

74 - 77h

32

Processor Core Feature 

Flags

From CPUID function 1, EDX contents

78h

8

Processor Feature Flags

[7] = Multi-Core

[6] = Serial Signature

[5] = Electronic Signature Present

[4] = Thermal Sense Device Present

[3] = Reserved

[2] = OEM EEPROM Present

[1] = Core VID Present

[0] = L3 Cache Present

79h

8

Processor Thread and Core 

Information

[7:2] = Number of cores

[1:0] = Number of threads per core

7Ah

8

Additional Processor Feature 

Flags

[7] = Reserved

[6] = Intel

®

 Cache Safe Technology

[5] = Extended Halt State (C1E)

[4] = Intel

®

 Virtualization Technology

[3] = Execute Disable

[2] = Intel

®

 64

[1] = Thermal Monitor TM2

[0] = Enhanced Intel SpeedStep

®

 

Technology

7B-7Ch

16

Thermal Adjustment Factors 

(Pending)

[15:8] = Measurement Correction Factor

[7:0] = Temperature Target

7D-7Eh

16

Reserved

Reserved

7Fh

8

Checksum

1 byte checksum