Fujitsu MPG3XXXAH-E 사용자 설명서
C141-E116-01EN
5 - 97
5.6.3
Ultra DMA data transfer
Figures 5.10 through 5.19 define the timings associated with all phases of Ultra DMA bursts.
Table 5.19 contains the values for the timings for each of the Ultra DMA Modes.
5.6.3.1 Initiating an Ultra DMA data in burst
5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.
Note:
The definitions for the STOP, HDMARDY-and DSTROBE signal lines are not in effect until
DMARQ and DMACK- are asserted.
DMARQ and DMACK- are asserted.
Figure 5.10 Initiating an Ultra DMA data in burst
DMARQ
(device)
(device)
DMACK-
(host)
(host)
STOP
(host)
(host)
HDMARDY-
(host)
(host)
DSTROBE
(device)
(device)
DD (15:0)
DA0,DA1,DA2,
CS0-,CS1-
CS0-,CS1-
t
UI
t
ENV
t
FS
t
ENV
t
ZAD
t
FS
t
ZAD
t
DVH
t
AZ
t
ZIORDY
t
ACK
t
ACK
t
ACK
t
VDS
t
DZFS
t
ZFS