Cypress CY7C1305BV25 사용자 설명서
CY7C1307BV25
CY7C1305BV25
Document #: 38-05630 Rev. *A
Page 2 of 21
Selection Guide
CY7C1305BV25-167
CY7C1307BV25-167
CY7C1307BV25-167
Unit
Maximum Operating Frequency
167
MHz
Maximum Operating Current
400
mA
25
6Kx1
6Kx1
8 Array
CLK
A
[17:0]
Gen.
K
K
Control
Logic
Logic
Address
Register
D
[17:0]
Read
Add
. Deco
de
Read Data Reg.
RPS
WPS
Q
[17:0]
Control
Logic
Logic
Address
Register
Reg.
Reg.
Reg.
36
18
18
72
18
BWS
[0:1]
Vref
W
rit
e Add
. Deco
de
Write
Reg
36
A
(17:0)
18
C
C
25
6Kx1
6Kx1
8 Array
25
6Kx1
6Kx1
8 Array
25
6Kx1
6Kx1
8 Array
Write
Reg
Write
Reg
Write
Reg
18
Logic Block Diagram (CY7C1307BV25)
128
K x 36 Array
CLK
A
(16:0)
Gen.
K
K
Control
Logic
Logic
Address
Register
D
[35:0]
Read Add
.
Deco
de
Read Data Reg.
RPS
WPS
Q
[35:0]
Control
Logic
Logic
Address
Register
Reg.
Reg.
Reg.
72
17
36
144
36
BWS
[0:3]
Vref
W
rit
e Add
. Deco
de
Write
Reg
72
A
(16:0)
17
C
C
128
K x 36 Array
128
K x 36 Array
128
K x 36 Array
Write
Reg
Write
Reg
Write
Reg
36
Logic Block Diagram (CY7C1305BV25)