Texas Instruments TMS320C6454 사용자 설명서
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PRODUCT PREVIEW
3.4.1
Peripheral Lock Register Description
TMS320C6454
Fixed-Point Digital Signal Processor
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
When written with correct 32-bit key (0x0F0A0B00), the Peripheral Lock Register (PERLOCK) allows one
write to the PERCFG0 register within 16 SYSCLK3 cycles.
write to the PERCFG0 register within 16 SYSCLK3 cycles.
NOTE
The instructions that write to the PERLOCK and PERCFG0 registers must be in the same
fetch packet if code is being executed from external memory. If the instructions are in
different fetch packets, fetching the second instruction from external memory may stall the
instruction long enough such that PERCFG0 register will be locked before the instruction
is executed.
fetch packet if code is being executed from external memory. If the instructions are in
different fetch packets, fetching the second instruction from external memory may stall the
instruction long enough such that PERCFG0 register will be locked before the instruction
is executed.
31
0
LOCKVAL
R/W-F0F0 F0F0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 3-3. Peripheral Lock Register (PERLOCK) - 0x02AC 0004
Table 3-6. Peripheral Lock Register (PERLOCK) Field Descriptions
Bit
Field
Value
Description
31:0
LOCKVAL
When programmed with 0x0F0A 0B00 allows one write to the PERCFG0 register within 16
SYSCLK3 clock cycles.
SYSCLK3 clock cycles.
Device Configuration
56