Texas Instruments TMS320C6454 사용자 설명서
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PRODUCT PREVIEW
3.4.4
Peripheral Status Registers Description
TMS320C6454
Fixed-Point Digital Signal Processor
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
The Peripheral Status Registers (PERSTAT0 and PERSTAT1) show the status of the C6454 peripherals.
31
30
29
27
26
24
Reserved
HPISTAT
McBSP1STAT
R-0
R-0
R-0
23
21
20
18
17
16
McBSP0STAT
I2CSTAT
GPIOSTAT
R-0
R-0
R-0
15
14
12
11
9
8
GPIOSTAT
TIMER1STAT
TIMER0STAT
EMACSTAT
R-0
R-0
R-0
R-0
7
6
5
0
EMACSTAT
Reserved
R-0
R-0
LEGEND: R = Read only; -n = value after reset
Figure 3-6. Peripheral Status Register 0 (PERSTAT0) - 0x02AC 0014
Table 3-9. Peripheral Status Register 0 (PERSTAT0) Field Descriptions
Bit
Field
Value
Description
31:30
Reserved
Reserved.
29:27
HPISTAT
HPI status
000
HPI is in the disabled state
001
HPI is in the enabled state
011
HPI is in the static powerdown state
101
HPI is in the enable in progress state
Others
Reserved
26:24
McBSP1STAT
McBSP1 status
000
McBSP1 is in the disabled state
001
McBSP1 is in the enabled state
011
McBSP1 is in the static powerdown state
101
McBSP1 is in the enable in progress state
Others
Reserved
23:21
McBSP0STAT
McBSP0 status
000
McBSP0 is in the disabled state
001
McBSP0 is in the enabled state
011
McBSP0 is in the static powerdown state
101
McBSP0 is in the enable in progress state
Others
Reserved
20:18
I2CSTAT
I2C status
000
I2C is in the disabled state
001
I2C is in the enabled state
011
I2C is in the static powerdown state
101
I2C is in the enable in progress state
Others
Reserved
Device Configuration
60