Texas Instruments TMS320DM646x 사용자 설명서
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3.12 EMAC Control Module Miscellaneous Interrupt Status Register (EWMISCSTAT)
EMAC Control Module Registers
The miscellaneous interrupt status register (EWMISCSTAT) is shown in
and described in
Figure 24. EMAC Control Module Miscellaneous Interrupt Status Register (CMMISCINTSTAT)
31
16
Reserved
R-0
15
4
3
2
1
0
Reserved
STATPENDINTSTAT
HOSTPENDINTSTAT
LINKINTSTAT
USERINTSTAT
R-0
R-0
R-0
R-0
R-0
LEGEND: R = Read only; -n = value after reset
Table 21. EMAC Control Module Miscellaneous Interrupt Status Register (CMMISCINTSTAT)
Field Descriptions
Bit
Field
Value
Description
31-4
Reserved
0
Reserved
3
STATPENDINTSTAT
EMAC module statistics interrupt (STATPEND) status.
0
EMAC module statistics interrupt (STATPEND) is not pending.
1
EMAC module statistics interrupt (STATPEND) is pending.
2
HOSTPENDINTSTAT
EMAC module host error interrupt (HOSTPEND) status.
0
EMAC module host error interrupt (HOSTPEND) is not pending.
1
EMAC module host error interrupt (HOSTPEND) is pending.
1
LINKINTSTAT
MDIO module link change interrupt (LINKINT) status.
0
MDIO module link change interrupt (LINKINT) is not pending.
1
MDIO module link change interrupt (LINKINT) is pending.
0
USERINTSTAT
MDIO module user interrupt (USERINT) status.
0
MDIO module user interrupt (USERINT) is not pending.
1
MDIO module user interrupt (USERINT) is pending.
SPRUEQ6 – December 2007
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
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