Intel cpb4612 사용자 설명서
12
2.1 Unpacking
Check the shipping carton for damage. If the shipping carton and contents are damaged, notify the carrier
and DTI for an insurance settlement. Retain the shipping carton and packing material for inspection by
the carrier. Obtain authorization before returning any product to DTI. Refer to the Return Shipment
Information page for assistance.
and DTI for an insurance settlement. Retain the shipping carton and packing material for inspection by
the carrier. Obtain authorization before returning any product to DTI. Refer to the Return Shipment
Information page for assistance.
CAUTION:
This board must be protected from static discharge and physical shock. Never
remove any of the socketed parts except at a static-free workstation. Use the anti-static bag
shipped with the product to handle the board. Wear a wrist strap grounded through one of
the system's ESD Ground jacks when servicing system components.
shipped with the product to handle the board. Wear a wrist strap grounded through one of
the system's ESD Ground jacks when servicing system components.
2.2 System
Requirements
The following topics briefly describe the basic system requirements and configurable features of the cPB-
4612. Links are provided to other chapters and appendices containing more detailed information.
4612. Links are provided to other chapters and appendices containing more detailed information.
2.2.1 BIOS
Version
For proper operation, the cPB-4612 must run the DTI enhanced AMI Embedded BIOS. The revision level
is shown in the BIOS Identification string displayed during the Power On Self Test (POST).
is shown in the BIOS Identification string displayed during the Power On Self Test (POST).
2.2.2 Connectivity
The cPB-4612 features an ejector handle that is keyed for compatible slots. The board can only be
inserted into slots fitted with a compatible mating key.
inserted into slots fitted with a compatible mating key.
The cPB-4612 is designed to operate in a backplane providing CompactPCI form factor interfaces at J1,
J2, J3, and J5. The J1 and J2 connectors are supplied for the CompactPCI bus, power and IPMI signals.
J3 signaling must comply with the PICMG* 2.16 Packet Switching Backplane specification. The J5
interface must have through-pins for the cPB-4612 to interface with a rear panel transition card such as
the cRT-4612. See the "Connectors" topic in Appendix B for connector descriptions.
J2, J3, and J5. The J1 and J2 connectors are supplied for the CompactPCI bus, power and IPMI signals.
J3 signaling must comply with the PICMG* 2.16 Packet Switching Backplane specification. The J5
interface must have through-pins for the cPB-4612 to interface with a rear panel transition card such as
the cRT-4612. See the "Connectors" topic in Appendix B for connector descriptions.
2.2.3 Electrical
and
Environmental
The cPB-4612 meets the following requirements:
• +5VDC +5%, -3% @ 6.9A typical
• +3.3VDC +5%, -3% @ 2.4A typical
• +12VDC ±10% @ 20mA typical
• -12VDC may be required by a PMC peripheral installed on the cPB-4612.
• +3.3VDC +5%, -3% @ 2.4A typical
• +12VDC ±10% @ 20mA typical
• -12VDC may be required by a PMC peripheral installed on the cPB-4612.