Intel 80L188EC 사용자 설명서
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL
4-2
4.2
RESTRICTIONS
Two words of the user stack are reserved for use by the iRISM-186 software. Other memory
and/or registers in the target memory are used by the iRISM-186 software. The exact amount and
location of this memory is implementation-dependent.
and/or registers in the target memory are used by the iRISM-186 software. The exact amount and
location of this memory is implementation-dependent.
An asynchronous serial port capable of operation at 9600 baud must be available in the target
system. The RISM described in this document uses the 80x186 EB/EC internal serial port.
system. The RISM described in this document uses the 80x186 EB/EC internal serial port.
The TRAP instruction is reserved.
Breakpoints and program stepping will not operate if the user’s code is in Flash or other
nonchangeable memory.
nonchangeable memory.
4.3
EMBEDDED CONTROLLER MONITOR (ECM)
An ECM (Embedded Controller Monitor) is installed in your target system to provide basic debug
capability. Capabilities include loading object files into system RAM, examining and modifying
variables, executing code, and stepping through code. A personal computer acts as the host for
program translation and emulates a video display during user interaction with the ECM. The
ECM developed for the 80x186 family makes the assumption that the user interface is a personal
computer; no provision is made for interface to a CRT terminal. By making this assumption, it is
possible to reduce the size and complexity of the code that must be installed in the target system.
The term coined for this target-resident code is Reduced Instruction Set Monitor (RISM).
capability. Capabilities include loading object files into system RAM, examining and modifying
variables, executing code, and stepping through code. A personal computer acts as the host for
program translation and emulates a video display during user interaction with the ECM. The
ECM developed for the 80x186 family makes the assumption that the user interface is a personal
computer; no provision is made for interface to a CRT terminal. By making this assumption, it is
possible to reduce the size and complexity of the code that must be installed in the target system.
The term coined for this target-resident code is Reduced Instruction Set Monitor (RISM).
The RISM consists of about 2200 bytes of 80x186 code that provides primitive operations.
Software running in the host uses the RISM commands to provide a complete user interface to
the target system. The advantage of this approach is that the ECM can be readily adapted to
different target systems and requires only a small part of the available target memory space. The
disadvantage is that the user interface must be provided by a personal computer.
Software running in the host uses the RISM commands to provide a complete user interface to
the target system. The advantage of this approach is that the ECM can be readily adapted to
different target systems and requires only a small part of the available target memory space. The
disadvantage is that the user interface must be provided by a personal computer.
RISM is structured as a short section of initialization code and an interrupt service routine (ISR).
The ISR processes interrupts from the host system. The RISM ISR consists of a short prologue
and a case-jump to one of 20 to 25 command executors. These executors are simple and short;
the flow though the entire ISR (including the prologue) is 15-20 instructions. The serial commu-
nication occurs at 9600 baud, which limits the frequency of these interrupts to 1 KHz. In the worst
case, the board will be slowed by the execution of a fairly short RISM ISR every millisecond
while executing user code. It is possible to operate the board so that no real time is lost to the
iECM-86 unless the user is actively interrogating the target. See “Initiating and Terminating
iECM-86” on page 4-3 and the description of the RISM REPORT_STATUS code (Code 14H)
on page 6-5 for details.
The ISR processes interrupts from the host system. The RISM ISR consists of a short prologue
and a case-jump to one of 20 to 25 command executors. These executors are simple and short;
the flow though the entire ISR (including the prologue) is 15-20 instructions. The serial commu-
nication occurs at 9600 baud, which limits the frequency of these interrupts to 1 KHz. In the worst
case, the board will be slowed by the execution of a fairly short RISM ISR every millisecond
while executing user code. It is possible to operate the board so that no real time is lost to the
iECM-86 unless the user is actively interrogating the target. See “Initiating and Terminating
iECM-86” on page 4-3 and the description of the RISM REPORT_STATUS code (Code 14H)
on page 6-5 for details.