DFI G586SP 사용자 설명서
G586SP/G586SP AIO
21
Cache Configuration
The system board supports 3.3V pipeline burst or asynchro-
nous cache SRAM installed in the 160-pin cache module
slot. The board can be configured to the following cache
sizes: 256KB, 512KB, or 1MB.
nous cache SRAM installed in the 160-pin cache module
slot. The board can be configured to the following cache
sizes: 256KB, 512KB, or 1MB.
Installing the Cache Module
1. Locate the 160-pin cache module slot on the system
board. Position the cache module above the slot. Make
sure pin 1 of the cache module is aligned with pin 1 of
the slot. Carefully slide the module into the slot. Press
firmly on top of it to seat it properly.
sure pin 1 of the cache module is aligned with pin 1 of
the slot. Carefully slide the module into the slot. Press
firmly on top of it to seat it properly.
Note:
Do not use 5V SRAM as they will not function properly. You
must first remove the onboard SRAM and/or TAG SRAM and
select the appropriate module type on JP14 before installing
the cache module.
Do not use 5V SRAM as they will not function properly. You
must first remove the onboard SRAM and/or TAG SRAM and
select the appropriate module type on JP14 before installing
the cache module.