Fujitsu FR81S 사용자 설명서
CHAPTER 36: EXTERNAL BUS INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
12
4.3. CS Wait Registers : AWR0 to AWR3 (Area Wait
Register 0-3)
The bit configurations of the CS wait registers are shown below.
These registers configure each type of wait for the CS areas CS0 to CS3. Each CS area has a single AWR
register. See "5.10 CS Setting Sequence" for the setting procedure for these registers.
AWR0 : Address 0680
H
(Access : Word)
AWR1 : Address 0684
H
(Access : Word)
AWR2 : Address 0688
H
(Access : Word)
AWR3 : Address 068C
H
(Access : Word)
bit31
bit30
bit29
bit28
bit27
bit26
bit25
bit24
Reserved
RWT[3:0]
Initial value
*
*
*
*
*
*
*
*
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R/W
R/W
R/W
R/W
bit23
bit22
bit21
bit20
bit19
bit18
bit17
bit16
WWT[3:0]
RIDL[1:0]
WRCV[1:0]
Initial value
*
*
*
*
*
*
*
*
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
CSRD[1:0]
RDCS[1:0]
CSWR[1:0]
WRCS[1:0]
Initial value
*
*
*
*
*
*
*
*
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
ADCY[1:0]
ACS[1:0]
ASCY
Reserved
RDYE
Reserved
Initial value
*
*
*
*
*
*
*
*
Attribute
R/W
R/W
R/W
R/W
R/W
R0,W0
R/W
R0,W0
* [Initial value] AWR0
0000_1111_0000_0000_1111_0000_0000_0000
B
Not AWR0
0000_XXXX_XXXX_XXXX_XXXX_XXXX_XXXX_X0X0
B
MB91520 Series
MN705-00010-1v0-E
1211