Fujitsu FR81S 사용자 설명서
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
2. Features
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
10
I
2
C
I
2
C interface supports buses among ICs, and runs as a master/slave device on the I
2
C bus. It is also equipped
with the FIFO for transmission/reception (64 bytes each).
Item
Function
Data buffer
⋅
Full duplex-double buffer (FIFO is unused)
⋅
Transmission/reception FIFO (16 bytes each) (when FIFO is used)
Serial input
Eliminate noise up to two clocks using bus clock for serial clock or serial data input.
Transfer mode
⋅
Synchronization
Baud rate
⋅
Dedicated baud rate generator provided (comprising 15-bit reload counter)
⋅
External clock input is adjustable with the reload counter.
Data length
8-bit
Signaling system NRZ (Non Return to Zero)
Interrupt request
⋅
Reception interrupt
⋅
Transmission interrupt
⋅
Status interrupt (INT interrupt, serial timer interrupt)
⋅
Interrupt request for ICU
⋅
Transmission FIFO interrupt (when the transmission FIFO is empty)
⋅
Both transmission and reception employ extended intelligent I/O service (EI
2
OS)
and DMA function
I
2
C
⋅
Master/slave transmission/reception function
⋅
Adjustment function
⋅
Clock synchronous function
⋅
Transmission direction detection function
⋅
Generation of iterative start condition and detection function
⋅
Bus error detection function
⋅
General call addressing function
⋅
7-bit addressing as master or slave
⋅
Interrupt can be generated at transmission or bus error
⋅
10-bit addressing function is supported by a program
Timer feature
⋅
Employs 16-bit serial timer
⋅
Dividing ratio of operating clock is selectable (1/1 to 1/256)
⋅
External trigger available
FIFO option
⋅
Transmission/reception FIFO equipped (transmission FIFO: 64 bytes, reception
FIFO: 64 bytes)
⋅
Transmission FIFO and reception FIFO can be selected
⋅
Transmission data can be retransmitted
⋅
Reception FIFO interrupt timing can be modified by software
⋅
FIFO reset is supported independently
DMA transfer support
Transmission: Supported
Reception: Not supported
Status: Not supported
Note:
I
2
C supports only ch.3 to ch.8, ch.10, and ch.11.
MB91520 Series
MN705-00010-1v0-E
1323