Fujitsu FR81S 사용자 설명서
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
80
4.3.12.
Baud rate Generator Register: BGR
Baud rate generator register (BGR) sets the division ratio of serial clock.
BGRn(n=0 to 11) : Address Base addr + 1C
H
(Access: Half-word, Word)
15
14
13
12
11
10
9
8
bit
-
BGR[14:8]
0
0
0
0
0
0
0
0
Initial value
RX,WX
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attribute
7
6
5
4
3
2
1
0
bit
BGR[7:0]
0
0
0
0
0
0
0
0
Initial value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attribute
[bit15] Undefined
No effect for writing operations.
[bit14 to bit0] BGR (Baud rate GeneratoR): Baud rate generator bits
⋅
Capable of writing a reload value to be counted and reading a set value.
⋅
Reload counter will start counting when a reload value is written.
Notes:
⋅
Write to the baud rate generator (BGR) in 16-bit access mode.
⋅
If the reload value is an even number, the "H" and "L" widths of the serial clock depend on the SCINV
bit setting as follows: If it is an odd number, the "H" and "L" widths of the serial clock are equal.
⋅
If SCINV="0", the "H" width of the serial clock is longer by one cycle of the bus clock.
⋅
If SCINV="1", the "L" width of the serial clock is longer by one cycle of the bus clock.
⋅
Set the reload value to 3 or higher.
⋅
When you change the setting value of the baud rate generator register (BGR), a new setting value will be
reloaded after the counter value becomes "15h00". Thus, if you wish to validate a new setting value
immediately, execute CSIO reset (UPCL) after you have changed the setting value of BGR.
⋅
To operate in the slave mode by setting "1" to the reception FIFO idle detection enable bit (FCR1:FRIIE)
when you use reception FIFO, set the baud rate at the BGR.
MB91520 Series
MN705-00010-1v0-E
1393