Fujitsu FR81S 사용자 설명서
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
89
Write
TDR1n-0n(n=0 to 11) : Address Base addr + 06
H
(Access: Byte, Half-word,
Word)
15
14
13
12
11
10
9
8
bit
-
-
-
-
-
-
-
-
-
Initial value
RX,WX RX,WX RX,WX RX,WX RX,WX RX,WX RX,WX RX,WX
Attribute
7
6
5
4
3
2
1
0
bit
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
1
1
Initial value
RX,W
RX,W
RX,W
RX,W
RX,W
RX,W
RX,W
RX,W
Attribute
The transmit data register (TDR) is the data buffer register for sending serial data.
⋅
When transmit operations are enabled (SCR:TXE=1), if transmission data is written to the transmit data
register (TDR), the transmission data is transferred to the transmit shift register and converted to serial
data, then output from the serial data output pin (SOT pin).
⋅
Transmission data empty flag (SSR:TDRE) will be cleared to "0" when the transmission data is written
to the serial transmit data register (TDR).
⋅
The transmission data empty flag (SSR:TDRE) will be set to "1" once a transmission starts after the
transmission data has been transferred to the transmit shift register if the transmission FIFO is disabled or
empty.
⋅
If the transmission data empty flag (SSR:TDRE) is "1", the next transmission data can be written. If the
transmission interrupt is enabled, a transmission interrupt will occur. Writing the next transmission data
should be performed by the generation of transmission interrupt or be done when the transmission data
empty flag (SSR:TDRE) is "1".
⋅
You will not be able to write transmission data to the transmit data register (TDR) when the transmission
data empty flag (SSR:TDRE) is "0" and transmission FIFO is disabled or full.
Notes:
⋅
Transmit data register is write-only register and receive data register is read-only register. Because the
two registers are located in the same address, write value and read value might be different. Therefore
instructions such as INC/DEC instructions which perform read-modify-write (RMW) operation cannot
be used.
⋅
For more information about the set timing of the transmission data empty flag (SSR: TDRE) when using
the transmission FIFO, see "7.1.5 Interrupts When Using Transmission FIFO and Flag Setting Timing".
MB91520 Series
MN705-00010-1v0-E
1402