Fujitsu FR81S 사용자 설명서
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
24
4.2.5. CAN Interrupt Register : INTR
The bit configuration of the CAN interrupt register is shown.
Displyas the message interrupt and status interrupt codes.
CAN Interrupt Register (upper byte): Address Base + 08
H
(Access: Byte,
Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
IntId15 to IntId8
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
CAN Interrupt Register (lower byte): Address Base + 09
H
(Access: Byte,
Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
IntId7 to IntId0
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
R,WX
If more than one interrupt codes are pending, the CAN interrupt register (INTR) will indicate the interrupt
code of the highest priority. If a higher-priority interrupt code is generated when an interrupt code is set to
the CAN interrupt register (INTR), the CAN interrupt register (INTR) is updated to the higher-order
interrupt code.
Higher orders are given to the status interrupt code (8000
Higher orders are given to the status interrupt code (8000
H
), message interrupt (0001
H
, 0002
H
, 0003
H
, ......,
0040
H
) in descending order. (For 64msgb. Same for 128msgb.)
When the IntId bit is other than 0000
H
and the IE bit of the CAN control register (CTRLR) is set to "1", the
interrupt signal for CPU is active. When the IntId bit is 0000
H
(an interrupt factor is reset) or the IE bit of
the CAN control register (CTRLR) is reset to "0", the interrupt signal is inactive.
If the IntPnd bit of the target message objects (for message objects, see "4.4 Message Object") is cleared to
If the IntPnd bit of the target message objects (for message objects, see "4.4 Message Object") is cleared to
"0", the message interrupt code will be cleared.
Status interrupt code will be cleared when the CAN status register (STATR) is read.
Status interrupt code will be cleared when the CAN status register (STATR) is read.
IntId
Function
0000
H
No interrupt
(For 64msgb) 0001
H
to 0040
H
(For 128msgb) 0001
H
to 0080
H
The message object number is indicated as an interrupt factor.
(Message interrupt code)
(For 64msgb) 0041
H
to 7FFF
H
(For 128msgb) 0081
H
to 7FFF
H
Unused
8000
H
Indicates interrupts with the change of the CAN status register (STATR).
(Status interrupt code)
8001
H
to FFFF
H
Unused
MB91520 Series
MN705-00010-1v0-E
1717