Fujitsu FR81S 사용자 설명서
CHAPTER 5: CLOCK
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK
FUJITSU SEMICONDUCTOR CONFIDENTIAL
59
5.2.1. Conditions for Generating Stabilization Wait Time
Conditions for the generating stabilization wait time are shown.
The cancellation of the oscillation stop control for each clock enters the oscillation stabilization wait status.
After the oscillation stabilization wait time specified by each clock, the oscillation stabilization wait status is
cancelled and supplying clock restarts.
The main (MCLK) clock enters the oscillation stabilization wait status when the oscillation stops before
cancellation of reset because the setting register is initialized by reset. The main clock does not enter the
oscillation stabilization wait status when the main clock oscillates by reset of INIT and RST level because the
main clock oscillation does not stop by reset of INIT and RST level.
MB91520 Series
MN705-00010-1v0-E
220