Fujitsu FR81S 사용자 설명서
CHAPTER 13: EXTERNAL INTERRUPT INPUT
3. Configuration
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL INTERRUPT INPUT
FUJITSU SEMICONDUCTOR CONFIDENTIAL
5
3. Configuration
This section explains the configuration of the external interrupt input.
Figure 3-1 Block Diagram
INTx external pin
Detection circuit
Set
EIRR
Clear
ENIR
ELVR
Bus access
Interrupt
Cleared by
writing zero
To I/O port controller
(When external
interrupts are enabled,
the INTx pins prevent
automatic port blocking
in standby mode.)
MB91520 Series
MN705-00010-1v0-E
478