Texas Instruments TMS320C645x DSP 사용자 설명서
www.ti.com
2.10.8
Promiscuous Receive Mode
EMAC Functional Architecture
When the promiscuous receive mode is enabled by setting the RXCAFEN bit in the RXMBPENABLE
register, non-address matching frames that would normally be filtered are transferred to the promiscuous
channel. Address matching frames that would normally be filtered due to errors are transferred to the
address match channel when RXCAFEN and RXCEFEN bits are set. Address matching frames with the
filter bit set (MATCHFILT = 0) are always filtered regardless of the RXCAFEN and RXCEFEN bit setting. A
frame is considered to be an address matching frame only if it is enabled to be received on a unicast,
multicast, or broadcast channel. Frames received to disabled unicast, multicast, or broadcast channels are
considered non-address matching.
register, non-address matching frames that would normally be filtered are transferred to the promiscuous
channel. Address matching frames that would normally be filtered due to errors are transferred to the
address match channel when RXCAFEN and RXCEFEN bits are set. Address matching frames with the
filter bit set (MATCHFILT = 0) are always filtered regardless of the RXCAFEN and RXCEFEN bit setting. A
frame is considered to be an address matching frame only if it is enabled to be received on a unicast,
multicast, or broadcast channel. Frames received to disabled unicast, multicast, or broadcast channels are
considered non-address matching.
MAC control frames address match only if RXCMFEN bit is set. RXCEFEN and RXCSFEN determine
whether error frames are transferred to memory or not, but they do not determine whether error frames
are address matching or not. Short frames are a special type of error frames.
whether error frames are transferred to memory or not, but they do not determine whether error frames
are address matching or not. Short frames are a special type of error frames.
A single channel is selected as the promiscuous channel by the RXPROMCH field in the RXMBPENABLE
register. The promiscuous receive mode is enabled by the RXCMFEN, RXCEFEN, RXCSFEN, and
RXCAFEN bits in RXMBPENABLE.
register. The promiscuous receive mode is enabled by the RXCMFEN, RXCEFEN, RXCSFEN, and
RXCAFEN bits in RXMBPENABLE.
shows the effects of the promiscuous enable bits. Proper
frames are frames that are between 64 and RXMAXLEN bytes in length inclusive and contain no code,
align, or CRC errors.
align, or CRC errors.
Table 8. Receive Frame Treatment Summary
RXMBPENABLE Bits
ADDRESS MATCH
RXCAFEN
RXCEFEN
RXCMFEN
RXCSFEN
Frame treatment
0
0
X
X
X
No frames transferred.
0
1
0
0
0
Proper frames transferred to promiscuous
channel.
channel.
0
1
0
0
1
Proper/undersized data frames transferred to
promiscuous channel.
promiscuous channel.
0
1
0
1
0
Proper data and control frames transferred to
promiscuous channel.
promiscuous channel.
0
1
0
1
1
Proper/undersized data and control frames
transferred to promiscuous channel.
transferred to promiscuous channel.
0
1
1
0
0
Proper/oversize/jabber/code/align/CRC data
frames transferred to promiscuous channel. No
control or undersized/fragment frames are
transferred.
frames transferred to promiscuous channel. No
control or undersized/fragment frames are
transferred.
0
1
1
0
1
Proper/undersized/fragment/oversize/jabber/cod
e/align/CRC data frames transferred to
promiscuous channel. No control frames are
transferred.
e/align/CRC data frames transferred to
promiscuous channel. No control frames are
transferred.
0
1
1
1
0
Proper/oversize/jabber/code/align/CRC data and
control frames transferred to promiscuous
channel. No undersized frames are transferred.
control frames transferred to promiscuous
channel. No undersized frames are transferred.
0
1
1
1
1
All non-address matching frames with and
without errors transferred to promiscuous
channel.
without errors transferred to promiscuous
channel.
1
X
0
0
0
Proper data frames transferred to address
match channel.
match channel.
1
X
0
0
1
Proper/undersized data frames transferred to
address match channel.
address match channel.
1
X
0
1
0
Proper data and control frames transferred to
address match channel.
address match channel.
1
X
0
1
1
Proper/undersized data and control frames
transferred to address match channel.
transferred to address match channel.
1
X
1
0
0
Proper/oversize/jabber/code/align/CRC data
frames transferred to address match channel.
No control or undersized frames are transferred.
frames transferred to address match channel.
No control or undersized frames are transferred.
SPRU975B – August 2006
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
53