Texas Instruments TNETE2201 사용자 설명서
Application Report
SLLA032
SLLA032
TNETE2201 EVM Kit Setup and Usage
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Figures
Figure 1. GBIC Setup Modifications ................................................................................................................4
Figure 2. Bit Error-Rate Ratio Test Configuration ...........................................................................................5
Figure 3. Eye Diagrams of High-Speed Serial Outputs ...................................................................................5
Figure 4. TNETE2201 EVM Board Schematic ................................................................................................7
Figure 5. TNETE2201 EVM Board Top Layer .................................................................................................9
Figure 6. TNETE2201 EVM Board GND Layer .............................................................................................10
Figure 7. TNETE2201 EVM Board VCC Layer .............................................................................................11
Figure 8. TNETE2201 EVM Board Bottom Layer..........................................................................................12
Figure 2. Bit Error-Rate Ratio Test Configuration ...........................................................................................5
Figure 3. Eye Diagrams of High-Speed Serial Outputs ...................................................................................5
Figure 4. TNETE2201 EVM Board Schematic ................................................................................................7
Figure 5. TNETE2201 EVM Board Top Layer .................................................................................................9
Figure 6. TNETE2201 EVM Board GND Layer .............................................................................................10
Figure 7. TNETE2201 EVM Board VCC Layer .............................................................................................11
Figure 8. TNETE2201 EVM Board Bottom Layer..........................................................................................12
Tables
Table 1. Default Setup as Shipped..................................................................................................................3
Table 2. TNETE2201 EVM Board Bill of Materials ..........................................................................................8
Table 2. TNETE2201 EVM Board Bill of Materials ..........................................................................................8
Introduction
The TNETE2201 EVM kit can act as a daughter board that plugs into new or existing
designs. By providing the appropriate cabling, the EVM kit can interface with just about
any test equipment or other reference designs. The EVM kit's high-speed serial interface
can use either the GBIC (Gigabit Interface Converter) standard interface or a 50-ohm
SMA connection. In addition, the GBIC specification allows the designer to choose either
a 75-ohm copper module or a selection of fiber-optics modules.
designs. By providing the appropriate cabling, the EVM kit can interface with just about
any test equipment or other reference designs. The EVM kit's high-speed serial interface
can use either the GBIC (Gigabit Interface Converter) standard interface or a 50-ohm
SMA connection. In addition, the GBIC specification allows the designer to choose either
a 75-ohm copper module or a selection of fiber-optics modules.
As the frequency of operation increases, the board designer must take special care to
ensure that the highest signal integrity is maintained. To achieve this, the board’s
impedance is controlled for both 50-ohm and 75-ohm high-speed transmission lines. In
addition, the 50-ohm impedance mismatches are reduced by designing the component
pad size to be as close as possible to the width of the connecting transmission line. Vias
are minimized and, when necessary, placed as close as possible to the device drivers.
Overall, the board layout is designed and optimized to support high-speed operation.
Thus, understanding impedance control and transmission line effects are crucial when
designing high-speed boards.
ensure that the highest signal integrity is maintained. To achieve this, the board’s
impedance is controlled for both 50-ohm and 75-ohm high-speed transmission lines. In
addition, the 50-ohm impedance mismatches are reduced by designing the component
pad size to be as close as possible to the width of the connecting transmission line. Vias
are minimized and, when necessary, placed as close as possible to the device drivers.
Overall, the board layout is designed and optimized to support high-speed operation.
Thus, understanding impedance control and transmission line effects are crucial when
designing high-speed boards.
Some of the advanced features offered by the EVM kit include:
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PCB (printed circuit board) designed for speeds in excess of 1.25 Gbps
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Flexible—The EVM can be configured to operate with multiple device types and with
copper or fiber interfaces.
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Integrated GBIC Interface eliminates the need for two boards.
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All input/output signals are accessible for rapid prototyping.
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Clock input is selectable for either 8/14 pin crystal or external clock input.
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Power can be supplied either by banana jacks or a 20-pin connector.
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Series terminated parallel outputs