Texas Instruments TMS320C3x 사용자 설명서

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TMS320C32 Memory Features
 
10-2
10.1 TMS320C32 Memory Features
The ’C32 external memory interface includes the following features:
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One external pin, PRGW, configures the external-program-memory width
to 16 or 32 bits.
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Two sets of memory strobes (STRB0 and STRB1) and one IOSTRB allow
zero glue-logic interface to two banks of memory and one bank of external
peripherals.
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Separate bus control registers for each strobe-control wait-state genera-
tion, external memory width, and data-type size.
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Each memory STRB handles 8-, 16- or 32-bit external data accesses
(reads and writes) to 8-, 16-, or 32-bit-wide memory.
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Multiprocessor support through the HOLD and HOLDA signals, is valid for
all the STRBs.