Texas Instruments TMS320C3x 사용자 설명서
16-Bit-Wide Memory Interface
10-30
Case 6: 16-Bit-Wide Memory with 32-Bit Data-Type Size
When the data type size is 32 bits, the ’C32 does not shift the internal address
before presenting it to the external address pins. In this case, the memory
interface copies the value of the internal address bus to the respective external
address pins. The memory interface also toggles STRBx_B3 / A
before presenting it to the external address pins. In this case, the memory
interface copies the value of the internal address bus to the respective external
address pins. The memory interface also toggles STRBx_B3 / A
–1
twice to
perform two 16-bit memory accesses. In the consecutive memory accesses,
the memory interface activates STRBx_B1 and STRBx_B0. In summary, the
memory interface seems to add one wait state to the 32-bit data access.
Figure 10–17 depicts a functional diagram of the memory interface for 16-bit
wide memory with 32-bit data type size.
the memory interface activates STRBx_B1 and STRBx_B0. In summary, the
memory interface seems to add one wait state to the 32-bit data access.
Figure 10–17 depicts a functional diagram of the memory interface for 16-bit
wide memory with 32-bit data type size.
Figure 10–17. Functional Diagram for 32-Bit Data-Type Size and 16-Bit External-Memory
Width
STRBx_B3/A
–1
STRBx_B1
STRBx_B0
STRBx_B0
A
24
A
23
A
22
A
21
.
.
.
A
.
.
A
3
A
2
A
1
A
0
CS
I/O(7-0)
I/O(7-0)
A
24
A
23
A
22
A
21
.
.
.
A
.
.
A
3
A
2
A
1
A
0
CS
I/O(7-0)
I/O(7-0)
’C32
A
23
A
22
A
21
A
20
.
.
.
.
.
A
2
A
1
A
0
D(15-8)
D(7-0)
A
23
A
22
A
21
A
20
.
.
.
.
.
A
2
A
1
A
0
Memory interface
STRBx logic
’C32’
s core address bus
toggle
For example, reading or writing to memory locations 4000h to 4004h involves
the pins listed in Table 10–13.
the pins listed in Table 10–13.