Texas Instruments TMS320C3x 사용자 설명서
TMS320C31 Boot Loader
11-4
11.1.3 TMS320C31 Boot-Loading Sequence
The following is the sequence of events that occur during the boot load of a
source program. Table 11–2 shows the structure of the source program.
source program. Table 11–2 shows the structure of the source program.
1) Select the boot loader by resetting the ’C31 while driving the MCBL / MP
pin high and the corresponding INT3 – INT0 pin low. The MCBL / MP must
stay high during boot loading, but can be changed anytime after boot
loading has terminated. No reset is necessary when changing the
INT3 – INT0 pin, as long as the ’C31 is not accessing the overlapping
memory (0h – FFFh) during this transition (see Section 11.1.6). The
INT3 – INT0 pin can be driven low anytime after deasserting the RESET
pin (driven low and then high).
stay high during boot loading, but can be changed anytime after boot
loading has terminated. No reset is necessary when changing the
INT3 – INT0 pin, as long as the ’C31 is not accessing the overlapping
memory (0h – FFFh) during this transition (see Section 11.1.6). The
INT3 – INT0 pin can be driven low anytime after deasserting the RESET
pin (driven low and then high).
2) The status of the interrupt flag (IF) register’s INT3 – INT0 bit fields dictate
the boot-loading mode. The bits are polled in the order described in the
flow chart in Figure 11–1.
flow chart in Figure 11–1.
3) If only the IF register’s INT3 bit field is set, the boot loader configures the
serial port for 32-bit fixed-burst mode reads with an externally generated
serial-port clock and FSR. Then, it proceeds to boot load the source pro-
gram from the serial port. The transferred data-bit order supplied to the
serial port must begin with the most significant bit (MSB) and end with the
least significant bit (LSB). Figure 11–3 depicts the boot-loader serial-port
flow.
serial-port clock and FSR. Then, it proceeds to boot load the source pro-
gram from the serial port. The transferred data-bit order supplied to the
serial port must begin with the most significant bit (MSB) and end with the
least significant bit (LSB). Figure 11–3 depicts the boot-loader serial-port
flow.
4) Otherwise, the boot loader attempts a memory boot load. Figure 11–2 shows
the boot-loader memory flow. If the IF register’s INT0 bit field is set, the
source program is loaded from memory location 1000h. If the IF register’s
INT1 bit field is set, the source program is loaded from memory location
400000h. If the IF register’s INT2 bit field is set, the source program is loaded
from memory location FFF000h.
source program is loaded from memory location 1000h. If the IF register’s
INT1 bit field is set, the source program is loaded from memory location
400000h. If the IF register’s INT2 bit field is set, the source program is loaded
from memory location FFF000h.
The memory boot-load source program has a header indicating the boot
memory width and memory configuration control word. This word is copied
into the STRB control register to configure the external primary bus interface.
memory width and memory configuration control word. This word is copied
into the STRB control register to configure the external primary bus interface.
5) After reading the header, the boot loader copies the source-program blocks.
The source-program blocks have two entries preceding the source-program-
block data. The first entry in the source-program block indicates the size of
the block. A block size of zero signals the end of the source program code.
The second entry indicates the address where the block is to be loaded. The
boot loader cannot load the source program to any memory address below
1000h, unless the address decode logic is remapped.
block data. The first entry in the source-program block indicates the size of
the block. A block size of zero signals the end of the source program code.
The second entry indicates the address where the block is to be loaded. The
boot loader cannot load the source program to any memory address below
1000h, unless the address decode logic is remapped.
6) The boot loader branches to the destination address of the first source
block loaded and begins program execution.