Texas Instruments TMS320C3x 사용자 설명서

다운로드
페이지 757
Serial Ports
12-35
Peripherals
12.2.12
Serial-Port Functional Operation
The following paragraphs and figures illustrate the functional timing of the
various serial-port modes of operation. The timing descriptions are presented
with the assumption that all signal polarities are configured to be positive (that
is, CLKXP = CLKRP = DXP = DRP = FSXP = FSRP = 0). Logical timing, in situ-
ations where one or more of these polarities are inverted, is the same except
with respect to the opposite polarity reference points (that is, rising vs. falling
edges, etc.).
These discussions pertain to the numerous operating modes and configurations
of the serial-port logic. When it is necessary to switch operating modes or
change configurations of the serial port, you should do so only when XRESET
or RRESET are asserted (low), as appropriate. When transmit configurations
are modified, XRESET should be low, and when receive configurations are
modified, RRESET should be low. When you use handshake mode, however,
since the transmitter and receiver are interrelated, you should make any configu-
ration changes with XRESET and RRESET both low.
All of the serial-port operating configurations can be classified in two categories:
fixed data-rate timing and variable data-rate timing. Both categories support
operation in either burst or continuous mode.
Burst-mode operation with variable data-rate timing is similar to burst-mode
operation with fixed data-rate timing. With variable data-rate timing, however,
FSX/R and data timing differ slightly at the beginning and end of transfers.
Specifically, there are three major differences between fixed and variable data-
rate timing:
-
FSX/R pulses typically last for the entire transfer interval in variable data-
rate timing operation, although FSR and external FSX are ignored after
the first bit transferred. FSX/R pulses in fixed data-rate mode typically last
only one CLKX/R cycle but can last longer.
-
With variable data-rate timing, data transfer begins during the CLKX/R
cycle in which FSX/R occurs. With fixed data-rate timing, data transfer be-
gins in the CLKX/R cycle following FSX/R.
-
With variable data-rate timing, frame sync inputs are ignored until the end
of the last bit transferred. With fixed data-rate timing, frame sync inputs are
ignored until the beginning of the last bit transferred.
The following paragraphs discuss fixed and variable data-rate operation and all
of their variations.