Texas Instruments TMS320C3x 사용자 설명서
Parallel NEGF and STF
NEGF||STF
13-177
Assembly Language Instructions
Example
NEGF
*AR4
– –
(1),R7
||
STF
R2,*++AR5(1)
Before Instruction
After Instruction
R2
07 33C0 0000
R2
07 33C0 0000
R7
00 0000 0000
R7
05 84C0 0000
AR4
80 98E1
AR4
80 98E0
AR5
80 9803
AR5
80 9804
LUF
0
LUF
0
LV
0
LV
0
UF
0
UF
0
N
0
N
0
Z
0
Z
0
V
0
V
0
C
0
C
0
Data memory
8098E1h
57B400000
8098E1h
57B4000
809804h
0
809804h
733C000
6.281250e+01
1.79750e+02
–6.281250e+01
1.79750e+02
1.79750e+02
6.281250e+01
Note:
Cycle Count
See subsection 8.5.2,
Data Loads and Stores, on page 8-24 for the effects
of operand ordering on the cycle count.