Texas Instruments TMS320C3x 사용자 설명서
Bitwise-Exclusive OR, 3-Operand
XOR3
13-251
Assembly Language Instructions
Example 1
XOR3 *AR3++(IR0),R7,R4
Before Instruction
After Instruction
R4
00 0000 0000
R4
00 0000 A53C
R7
00 0000 FFFF
R7
00 0000 FFFF
AR3
80 9800
AR3
80 9810
IR0
10
IR0
10
LUF
0
LUF
0
LV
0
LV
0
UF
0
UF
0
N
0
N
0
Z
0
Z
0
V
0
V
0
C
0
C
0
Data memory
809800h
5AC3
809800h
5AC3
Example 2
XOR3 R5,*–AR1(1),R1
Before Instruction
After Instruction
R1
00 0000 0000
R1
00 0000 0F33
R5
00 000F FA32
R5
00 000F FA32
AR1
80 9826
AR1
80 9826
LUF
0
LUF
0
LV
0
LV
0
UF
0
UF
0
N
0
N
0
Z
0
Z
0
V
0
V
0
C
0
C
0
Data memory
809825h
0FF5C1
809825h
0FF5C1
Note:
Cycle Count
See subsection 8.5.2,
Data Loads and Stores, on page 8-24 for the effects
of operand ordering on the cycle count.