Texas Instruments TMS320C3x 사용자 설명서
A-1
Appendix A
Instruction Opcodes
The opcode fields for all TMS320C3x instructions are shown in Table A–1. Bits
in the table marked with a hyphen are defined in the individual instruction
descriptions (see Chapter 13,
in the table marked with a hyphen are defined in the individual instruction
descriptions (see Chapter 13,
Assembly Language Instructions). Table A–1,
along with the instruction descriptions, fully defines the instruction words. The
opcodes are listed in numerical order. Note that an undefined operation may
occur if an illegal opcode is executed. (An Illegal opcode can only be generated
by the misuse of the TMS320 floating-point software tools, by an error in the
ROM code, or by a defective RAM.)
opcodes are listed in numerical order. Note that an undefined operation may
occur if an illegal opcode is executed. (An Illegal opcode can only be generated
by the misuse of the TMS320 floating-point software tools, by an error in the
ROM code, or by a defective RAM.)
Appendix A