Motorola MCF5281 사용자 설명서

MOTOROLA

Chapter 13.  External Interface Module (EIM)  

13-7

The read cycle timing diagram is shown in Figure 13-6.

In the following timing diagrams, TA waveforms apply for
chip selects programmed to enable either internal or external
termination. TA assertion should look the same in either case.

Note the following characteristics of a basic read:

• In S3, data is made available by the external device on the falling edge of CLKOUT 

and is sampled on the rising edge of CLKOUT with TA asserted.

1.

Set R/W to read

2.

Place address on A[31:0]

3.

Assert TIP, and SIZ[1:0] 

4.

Assert TS

5.

Negate TS

1.

Decode address and select the 
appropriate slave device.

2.

Drive data on D[31:0]

3.

Assert TA

1.

Sample TA low and latch data

1.

Negate TA.

2.

Stop driving D[31:0]

1.

Start next cycle

R/W

TIP

TS

D[31:0]

TA

Read

S0

S1

S2

S3

S4

S5

CLKOUT

CSn, BSn, OE

A[31:0], SIZ[1:0]