Motorola MCF5281 사용자 설명서

MOTOROLA

Chapter 14.  Signal Descriptions  

14-3

Table 14-1 lists the MCF5282 signals grouped by functionality.

The primary functionality of a pin is not necessarily its default
functionality. Pins that are muxed with GPIO will default to
their GPIO functionality. 

Address

A[23:0]

Define the address of external byte, 
word, longword, and 16-byte burst 
accesses.

I/O

Data

D[31:0]

Data bus. Provide the general 
purpose data path between the MCU 
and all other devices.

I/O

Byte strobes

BS[3:0]

Define the byte lane of data on the 
data bus.

I/O

Output enable

OE

Indicates when an external device can 
drive data on the bus.

O

Transfer acknowledge

TA

Indicates that the external data 
transfer is complete and should be 
asserted for one clock.

I

Transfer error 
acknowledge

TEA

Indicates that an error condition exists 
for the bus transfer.

I

Read/Write

R/W

Indicates the direction of the data 
transfer on the bus.

I/O

Transfer size

SIZ[1:0]

Specify the data access size of the 
current external bus reference.

O

Transfer start

TS

Asserted during the first CLKOUT 
cycle of a transfer when address and 
attributes are valid.

O

Transfer in progress

TIP

Asserted to indicate that a bus 
transfer is in progress. Negated during 
idle bus cycles.

O

Chip selects

CS[6:0]

Programmed for a base address 
location and for masking addresses, 
port size and burst capability 
indication, wait state generation, and 
internal/external termination.

O

SDRAM row 
address strobe

SRAS

SDRAM synchronous row address 
strobe.

O

SDRAM column 
address strobe

SCAS

SDRAM synchronous column address 
strobe.

O