Motorola MCF5281 사용자 설명서

25-16

MOTOROLA

 

• If the RXCTR increases to a value greater than 127, it is no longer incremented, even 

if more errors are detected while being a receiver. At the next successful message 
reception, the counter is set to a value between 119 and 127, in order to return to 
Error Active state.

Initialization of the FlexCAN includes the initial configuration of the message buffers and
configuration of the CAN communication parameters following a reset, as well as any
reconfiguration which may be required during operation. The following is a generic
initialization sequence for the FlexCAN:

1. Initialize all operation modes

a) Initialize the transmit and receive pin modes in control register 0 

(CANCTRL0).

b) Initialize the bit timing parameters PROPSEG, PSEGS1, PSEG2, and RJW 

in control registers 1 and 2 (CANCTRL[1:2]).

c) Select the S-clock rate by programming the PRESDIV register.
d) Select the internal arbitration mode (LBUF bit in CANCTRL1).

2. Initialize message buffers

a) The control/status word of all message buffers must be written either as an 

active or inactive message buffer.

b) All other entries in each message buffer should be initialized as required.

3. Initialize mask registers for acceptance mask as needed
4. Initialize FlexCAN interrupt handler

a) Initialize the interrupt configuration register (CANICR) with a specific request 

level and vector base address.

b) Set the required mask bits in the IMASK register (for all message buffer 

interrupts), in CANCTRL0 (for bus off and error interrupts), and in CANMCR 
for the WAKE interrupt.

5. Negate the HALT bit in the module configuration register

a) At this point, the FlexCAN will attempt to synchronize with the CAN bus.

In both the transmit and receive processes, the first action in
preparing a message buffer should be to deactivate the buffer
by setting its code field to the proper value. This requirement is
mandatory to assure data coherency.