Motorola MCF5281 사용자 설명서

MOTOROLA

Chapter 27.  Queued Analog-to-Digital Converter (QADC)  

27-63

No A/D converter can be more accurate than its analog reference. Any noise in the
reference can result in at least that much error in a conversion. The reference for the QADC,
supplied by signals V

RH

 and V

RL

, should be low-pass filtered from its source to obtain a

noise-free, clean signal. In many cases, simple capacitive bypassing may suffice. In
extreme cases, inductors or ferrite beads may be necessary if noise or RF energy is present.
External resistance may introduce error in this architecture under certain conditions. Any
series devices in the filter network should contain a minimum amount of DC resistance.

For accurate conversion results, the analog reference voltages must be within the limits
defined by V

DDA

 and V

SSA

, as explained in this subsection.

The analog supply signals (V

DDA

 and V

SSA

) define the limits of the analog reference

voltages (V

RH

 and V

RL

) and of the analog multiplexer inputs. Figure 27-44 is a diagram of

the analog input circuitry.

Because the sample amplifier is powered by V

DDA

 and V

SSA

, it can accurately transfer

input signal levels up to but not exceeding V

DDA

 and down to but not below V

SSA. 

If the

input signal is outside of this range, the output from the sample amplifier is clipped.

In addition, V

RH

 and V

RL

 must be within the range defined by V

DDA

 and V

SSA

. As long as

V

RH

 is less than or equal to V

DDA

, and V

RL

 is greater than or equal to V

SSA

, and the sample

amplifier has accurately transferred the input signal, resolution is ratiometric within the
limits defined by V

RL

 and V

RH

. If V

RH

 is greater than V

DDA

, the sample amplifier can

Sample

AMP

16 Channels Total 

V

RL

V

DDA

V

RH

S/H 

Comparator

C

V

SSA