Motorola MCF5281 사용자 설명서

MOTOROLA

Chapter 33.  Electrical Characteristics  

33-7

8

Assuming a reference is available at power up, lock time is measured from the time V

DD

 and V

DDPLL 

are valid 

to RSTO negating. If the crystal oscillator is being used as the reference for the PLL, then the crystal start up 
time must be added to the PLL lock time to determine the total start-up time.

9

PLL is operating in 1:1 PLL mode.

10

Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum 
f

sys

. Measurements are made with the device powered by filtered supplies and clocked by a stable external clock 

signal. Noise injected into the PLL circuitry via V

DDPLL

 and V

SSPLL

 and variation in crystal oscillator frequency 

increase the Cjitter percentage for a given interval

11

Based on slow system clock of 40 MHz measured at f

sys

 max.

Analog Supply, with reference to V

SSA 

V

DDA

–0.3

6.0

V

Internal Digital Supply 

1

, with reference to V

SS 

1

For internal digital supply of V

DD

 = 3.3V typical. 

V

DD

–0.3

4.0

V

Reference Supply, with reference to V

RL

V

RH

–0.3

6.0

V

V

SS

 

Differential Voltage

V

SS

 

– V

SSA

–0.1

0.1

V

V

DD

 

Differential Voltage

 2

2

Refers to allowed random sequencing of power supplies. 

V

DD

 

– V

DDA

–6.0

4.0

V

V

REF

 

Differential Voltage

V

RH

 – V

RL

–0.3

6.0

V

V

RH

 to V

DDA

 

Differential Voltage

 3

3

Refers to allowed random sequencing of power supplies. 

V

RH

 

– V

DDA

–6.0

6.0

V

V

RL

 to V

SSA

 

Differential Voltage

V

RL

 

– V

SSA

–0.3

0.3

V

V

DDH

 to V

DDA

 

Differential Voltage

V

DDH

 

– V

DDA

–1.0

1.0

V

Maximum Input Current 

4, 5, 6

4

Transitions within the limit do not affect device reliability or cause permanent damage. Exceeding limit may cause 
permanent conversion error on stressed channels and on unstressed channels.

5

Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, 
calculate resistance values using V

POSCLAMP

 = V

DDA

 + 0.3V and V

NEGCLAMP

 = –0.3 V, then use the larger of the 

calculated values.

6

Condition applies to one pin at a time.

I

MA

–25

25

mA

(V

DDH 

and V

DDA 

= 5.0 V

dc

 

±

 0.5V, V

DD 

= 2.7-3.6V, V

SS

 and V

SSA

 = 0 V

dc

, FQCLK = 2.0 MHz, TA within operating temperature range)

Analog Supply 

V

DDA

3.3

5.5

V

V

SS

 

Differential Voltage

V

SS

 

– V

SSA

-100

100

mV

Reference Voltage Low

 2

V

RL

V

SSA

V

SSA

 + 0.1

V

Reference Voltage High

 2

V

RH

V

DDA

 – 0.1

V

DDA

 

V

V

REF

 Differential Voltage

 

V

RH

 – V

RL

3.3

5.5

V