Texas Instruments TMS320DM355 사용자 설명서
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PRODUCT PREVIEW
2.4.12 Clock Interface
TMS320DM355
Digital Media System-on-Chip (DMSoC)
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Table 2-17. SPI Terminal Functions (continued)
TERMINAL
TYPE
(1)
OTHER
(2) (3)
DESCRIPTION
NAME
NO.
Standard CCD Analog Front End (AFE): Not used
•
YCC 16-bit: time multiplexed between chroma. CB/CR[07]
CIN7/
•
YCC 8-bit (which allows for two simultaneous decoder inputs), it is
PD
GIO101/
N3
I/O/Z
time multiplexed between luma and chroma of the upper channel.
V
DD_VIN
SPI2_SCLK
Y/CB/CR[07]
SPI: SPI2 clock
GIO: GIO[101]
GIO: GIO[101]
Standard CCD Analog Front End (AFE): Raw[13]
•
YCC 16-bit: time multiplexed between chroma. CB/CR[05]
CIN5/
•
YCC 8-bit (which allows for two simultaneous decoder inputs), it is
PD
GIO099/
M3
I/O/Z
time multiplexed between luma and chroma of the upper channel.
V
DD_VIN
SPI2_SDENA[0]
Y/CB/CR[07]
SPI: SPI2 chip select
GIO: GIO[099]
GIO: GIO[099]
Standard CCD Analog Front End (AFE): Raw[12]
•
YCC 16-bit: time multiplexed between chroma. CB/CR[04]
CIN4/
•
YCC 8-bit (which allows for two simultaneous decoder inputs), it is
GIO098/
PD
L4
I/O/Z
time multiplexed between luma and chroma of the upper channel.
SPI2_SDI/
V
DD_VIN
Y/CB/CR[04]
SPI2_SDENA[1]
SPI: SPI2 Data in
GIO: GIO[0998]
GIO: GIO[0998]
Standard CCD Analog Front End (AFE): Not used
•
YCC 16-bit: time multiplexed between chroma. CB/CR[06]
CIN6/
•
YCC 8-bit (which allows for two simultaneous decoder inputs), it is
PD
GIO100/
K5
I/O/Z
time multiplexed between luma and chroma of the upper channel.
V
DD_VIN
SPI2_SDO/
Y/CB/CR[06]
SPI: SPI2 Data out
GIO: GIO[100]
GIO: GIO[100]
The provides interface with the system clocks.
Table 2-18. Clocks Terminal Functions
TERMINAL
TYPE
(1)
OTHER
(2) (3)
DESCRIPTION
NAME
NO.
CLKOUT1
CLKOUT: Output Clock 1
D12
I/O/Z
V
DD
/ GIO018
GIO: GIO[018]
CLKOUT2
CLKOUT: Output Clock 2
A11
I/O/Z
V
DD
/ GIO017
GIO: GIO[017]
CLKOUT3
CLKOUT: Output Clock 3
C11
I/O/Z
V
DD
/ GIO016
GIO: GIO[016]
MXI1
A9
I
V
DD
Crystal input for system oscillator (24 MHz or 36 MHz)
Output for system oscillator (24 MHz or 36 MHz). When the MX02 is not used,
MXO1
B9
O
V
DD
the MX02 signal can be left open.
Crystal input for video oscillator (27 MHz) Optional, use only if 27MHz derived
from MXI1 and PLL does not provide sufficient performance for Video DAC.
from MXI1 and PLL does not provide sufficient performance for Video DAC.
MXI2
R1
I
V
DD
When the MX12 is not used and powered down, the MXI2 signal should be left
as a No Connect
as a No Connect
Output for video oscillator (27 MHz) Optional, use only if 27MHz derived from
MXI1 and PLL does not provide sufficient performance for Video DAC When the
MXI1 and PLL does not provide sufficient performance for Video DAC When the
MXO2
T1
O
V
DD
MXO2 is not used and powered down, the MXO2 signal should be left as a No
Connect.
Connect.
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2)
Specifies the operating I/O supply voltage for each signal. See
, Power Supplies for more detail.
(3)
PD = pull-down, PU = pull-up. (To pull up a signal to the opposite supply rail, a 1 k
Ω
resistor should be used.)
Device Overview
32