Renesas SH7264 사용자 설명서
Section 32 General Purpose I/O Ports
Page 1720 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
32.2.14
Port D Port Registers 0 (PDDR0)
PDDR0 is a 16-bit readable/writable register that stores port D data. The PD15DR to PD0DR bits
correspond to the PD15 to PD0 pins, respectively.
correspond to the PD15 to PD0 pins, respectively.
When a pin function is general output, if a value is written to PDDR0, that value is output directly
from the pin, and if PDDR0 is read, the register value is returned directly regardless of the pin
state.
from the pin, and if PDDR0 is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PDDR0 is read, the pin state, not the register value, is
returned directly. If a value is written to PDDR0, although that value is written into PDDR0, it
does not affect the pin state. Table 32.16 summarizes PDDR0 read/write operation.
returned directly. If a value is written to PDDR0, although that value is written into PDDR0, it
does not affect the pin state. Table 32.16 summarizes PDDR0 read/write operation.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PD15
DR
PD14
DR
PD13
DR
PD12
DR
PD11
DR
PD10
DR
PD9
DR
PD8
DR
PD7
DR
PD6
DR
PD5
DR
PD4
DR
PD3
DR
PD2
DR
PD1
DR
PD0
DR
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W
Description
15
PD15DR
0
R/W
See table 32.16
14 PD14DR
0
R/W
13 PD13DR
0
R/W
12 PD12DR
0
R/W
11 PD11DR
0
R/W
10 PD10DR
0
R/W
9 PD9DR
0
R/W
8 PD8DR
0
R/W
7 PD7DR
0
R/W
6 PD6DR
0
R/W
5 PD5DR
0
R/W
4 PD4DR
0
R/W
3 PD3DR
0
R/W
2 PD2DR
0
R/W
1 PD1DR
0
R/W
0 PD0DR
0
R/W