Renesas R5S72642 사용자 설명서
Section 2 CPU
Page 90 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
2.4.10
Bit Manipulation Instructions
Table 2.19 Bit Manipulation Instructions
Instruction
Instruction Code
Operation
Execu-
tion
Cycles T Bit
Compatibility
SH2,
SH2E SH4 SH-2A
BAND.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0100dddddddddddd
(imm of (disp + Rn)) & T
3
Ope-
ration
result
Yes
BANDNOT.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
1100dddddddddddd
~(imm of (disp + Rn)) & T
T 3
Ope-
ration
result
Yes
BCLR.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0000dddddddddddd
0
(imm of (disp + Rn))
3
Yes
BCLR #imm3,Rn
10000110nnnn0iii 0 imm of Rn
1
Yes
BLD.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0011dddddddddddd
(imm of (disp + Rn))
3
Ope-
ration
result
Yes
BLD #imm3,Rn
10000111nnnn1iii imm of Rn T
1
Ope-
ration
result
Yes
BLDNOT.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
1011dddddddddddd
~(imm of (disp + Rn))
T
3 Ope-
ration
result
Yes
BOR.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0101dddddddddddd
( imm of (disp + Rn)) | T
T 3
Ope-
ration
result
Yes
BORNOT.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
1101dddddddddddd
~( imm of (disp + Rn)) | T
T 3
Ope-
ration
result
Yes
BSET.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0001dddddddddddd
1
( imm of (disp + Rn))
3
Yes
BSET #imm3,Rn
10000110nnnn1iii 1 imm of Rn
1
Yes
BST.B #imm3,@(disp12,Rn)
0011nnnn0iii1001
0010dddddddddddd
T
(imm of (disp + Rn))
3
Yes
BST #imm3,Rn
10000111nnnn0iii T imm of Rn
1
Yes