Intel Xeon X3450 BX80605X3450 사용자 설명서
제품 코드
BX80605X3450
Interfaces
28
Intel® Xeon® Processor 3400 Series Datasheet, Volume 1
2.4
Platform Environment Control Interface (PECI)
The PECI is a one-wire interface that provides a communication channel between
processor and a PECI master, usually the PCH. The processor implements a PECI
interface to:
processor and a PECI master, usually the PCH. The processor implements a PECI
interface to:
• Allow communication of processor thermal and other information to the PECI
master.
• Read averaged Digital Thermal Sensor (DTS) values for fan speed control.
2.5
Interface Clocking
2.5.1
Internal Clocking Requirements
§
Table 2-4.
Processor Reference Clock Requirements
Reference Input Clocks
Input Frequency
Associated PLL
BCLK[0]/BCLK#[0]
133 MHz
Processor/Memory
PEG_CLK/PEG_CLK#
100 MHz
PCI Express/DMI