Intel Xeon 7130N LF80550KF0878M 데이터 시트
제품 코드
LF80550KF0878M
Features
Dual-Core Intel
®
Xeon
®
Processor 7000 Series Datasheet
85
alarm condition persists). If the SM_ALERT# signal is enabled via the Thermal Sensor
Configuration Register and a thermal diode threshold is exceeded, an alert will be sent to the
platform via the SM_ALERT# signal.
Configuration Register and a thermal diode threshold is exceeded, an alert will be sent to the
platform via the SM_ALERT# signal.
7.4.6.4
Configuration Register
The Configuration Register controls several functions of the temperature sensor such as ALERT#
masking, stand-by mode, and others.
masking, stand-by mode, and others.
shows the bit definitions of the
Configuration Registers.
Table 7-12. SMBus Thermal Sensor Status Register 1
Bit
Name
Reset State
Function
7 (MSB)
BUSY
N/A
If set, indicates that the device’s analog to digital
converter is busy.
converter is busy.
6
RESERVED
RESERVED
Reserved for future use.
5
RESERVED
RESERVED
Reserved for future use.
4
R1HIGH
0
If set, indicates the processor core 1 thermal diode high
temperature alarm has activated.
temperature alarm has activated.
3
R1LOW
0
If set, indicates the processor core 1 thermal diode low
temperature alarm has activated.
temperature alarm has activated.
2
R1OPEN
0
If set, indicates an open fault in the connection to the
processor core 1 diode.
processor core 1 diode.
1
RESERVED
RESERVED
Reserved for future use.
0 (LSB)
RESERVED
RESERVED
Reserved for future use.
Table 7-13. SMBus Thermal Sensor Status Register 2
Bit
Name
Reset State
Function
7 (MSB)
RESERVED
RESERVED
Reserved for future use.
6
RESERVED
RESERVED
Reserved for future use.
5
RESERVED
RESERVED
Reserved for future use.
4
R2HIGH
0
If set, indicates the processor core 2 thermal diode high
temperature alarm has activated.
temperature alarm has activated.
3
R2LOW
0
If set, indicates the processor core 2 thermal diode low
temperature alarm has activated.
temperature alarm has activated.
2
R2OPEN
0
If set, indicates an open fault in the connection to the
processor core 2 diode.
processor core 2 diode.
1
RESERVED
RESERVED
Reserved for future use.
0 (LSB)
ALERT
0
If set, indicates the ALERT pin has been asserted low.
This bit gets reset when the ALERT output gets reset.
This bit gets reset when the ALERT output gets reset.
Table 7-14. SMBus Thermal Sensor Configuration Register (Sheet 1 of 2)
Bit
Name
Reset State
Function
7 (MSB)
MASK
0
Mask SM_ALERT# bit. Clear the bit to allow interrupts
via SM_ALERT# and allow the thermal sensor to
respond to the ARA command when an alarm is active.
Set the bit to disable interrupt mode. The bit is not used
to clear the state of the SM_ALERT# output. An ARA
command may not be recognized if the mask is
enabled.
via SM_ALERT# and allow the thermal sensor to
respond to the ARA command when an alarm is active.
Set the bit to disable interrupt mode. The bit is not used
to clear the state of the SM_ALERT# output. An ARA
command may not be recognized if the mask is
enabled.