Intel E5220 EU80573KJ0536M 데이터 시트

제품 코드

EU80573KJ0536M

Dual-Core Intel® Xeon® Processor 5200 Series Datasheet

Contents

Introduction ..............................................................................................................9
1.1

Terminology ..................................................................................................... 10

1.2

State of Data .................................................................................................... 13

1.3

References ....................................................................................................... 13

Dual-Core Intel® Xeon® Processor 5200 Series Electrical Specifications................. 15
2.1

Front Side Bus and GTLREF ................................................................................ 15

2.2

Power and Ground Lands.................................................................................... 15

2.3

Decoupling Guidelines........................................................................................ 16
2.3.1

VCC

Decoupling...................................................................................... 16

2.3.2

VTT

Decoupling ...................................................................................... 16

2.3.3

Front Side Bus AGTL+ Decoupling ............................................................ 16

2.4

Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ....................................... 17
2.4.1

Front Side Bus Frequency Select Signals (BSEL[2:0]) .................................. 17

2.4.2

PLL Power Supply ................................................................................... 18

2.5

Voltage Identification (VID) ................................................................................ 18

2.6

Reserved, Unused, and Test Signals..................................................................... 21

2.7

Front Side Bus Signal Groups.............................................................................. 22

2.8

CMOS Asynchronous and Open Drain Asynchronous Signals .................................... 24

2.9

Test Access Port (TAP) Connection....................................................................... 24

2.10 Platform Environmental Control Interface (PECI) DC Specifications........................... 24

2.10.1 DC Characteristics .................................................................................. 24
2.10.2 Input Device Hysteresis .......................................................................... 25

2.11 Mixing Processors.............................................................................................. 26
2.12 Absolute Maximum and Minimum Ratings ............................................................. 26
2.13 Processor DC Specifications ................................................................................ 27

2.13.1 Flexible Motherboard Guidelines (FMB) ...................................................... 27
2.13.2 VCC Overshoot Specification .................................................................... 35
2.13.3 Die Voltage Validation ............................................................................. 35

2.14 AGTL+ FSB Specifications................................................................................... 36

Mechanical Specifications ........................................................................................ 39
3.1

Package Mechanical Drawings ............................................................................. 39

3.2

Processor Component Keepout Zones................................................................... 43

3.3

Package Loading Specifications ........................................................................... 43

3.4

Package Handling Guidelines............................................................................... 44

3.5

Package Insertion Specifications.......................................................................... 44

3.6

Processor Mass Specifications ............................................................................. 44

3.7

Processor Materials............................................................................................ 44

3.8

Processor Markings............................................................................................ 44

3.9

Processor Land Coordinates ................................................................................ 45

Land Listing............................................................................................................. 47
4.1

Dual-Core Intel® Xeon® Processor 5200 Series Pin Assignments ............................ 47
4.1.1

Land Listing by Land Name...................................................................... 47

4.1.2

Land Listing by Land Number ................................................................... 57

Signal Definitions .................................................................................................... 67
5.1

Signal Definitions .............................................................................................. 67

Thermal Specifications ............................................................................................ 75
6.1

Package Thermal Specifications........................................................................... 75
6.1.1

Thermal Specifications ............................................................................ 75

6.1.2

Thermal Metrology ................................................................................. 84

6.2

Processor Thermal Features ................................................................................ 85