Gateway Intel Xeon L5520 TC.32500.005 사용자 설명서
제품 코드
TC.32500.005
Register Description
58
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
2.7.2
SAD_PAM456
Register for legacy dev0func0 94h-97h address space.
Device:
0
Function: 1
Offset:
44h
Access as a Dword
Bit
Type
Reset
Value
Description
21:20
RW
0
PAM6_HIENABLE. 0EC000-0EFFFF Attribute (HIENABLE) This field controls
the steering of read and write cycles that address the BIOS area from
0EC000 to 0EFFFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
17:16
RW
0
PAM6_LOENABLE. 0E8000-0EBFFF Attribute (LOENABLE) This field controls
the steering of read and write cycles that address the BIOS area from
0E8000 to 0EBFFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
13:12
RW
0
PAM5_HIENABLE. 0E4000-0E7FFF Attribute (HIENABLE) This field controls
the steering of read and write cycles that address the BIOS area from
0E4000 to 0E7FFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
9:8
RW
0
PAM5_LOENABLE. 0E0000-0E3FFF Attribute (LOENABLE) This field controls
the steering of read and write cycles that address the BIOS area from
0E0000 to 0E3FFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
5:4
RW
0
PAM4_HIENABLE. 0DC000-0DFFFF Attribute (HIENABLE) This field controls
the steering of read and write cycles that address the BIOS area from
0DC000 to 0DFFFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
1:0
RW
0
PAM4_LOENABLE. 0D8000-0DBFFF Attribute (LOENABLE) This field
controls the steering of read and write cycles that address the BIOS area
from 0D8000 to 0DBFFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.