Nokia N70 서비스 매뉴얼

GSM PA module

A single GSM/EDGE PA module contains two separate amplifier chains, one for EGSM900 (and GSM850) and

another for GSM1800/1900. Both amplifiers have a battery supply connection and two bias current inputs. The

bias current for final amplifier stage is adjusted according the power level in use in order to optimise efficiency.

The bias currents are also used as on/off switching signals for PAs.
In the EDGE mode, PA linearity has to be higher than in the GMSK mode because of envelope variations of the

8-PSK modulations. This is achieved by increasing the bias currents compared to the GMSK mode and setting a

dedicated Vmode control signal up. Increasing bias currents improves the linearity of the amplifiers, but it also

tends to unnecessarily increase the gain of the PA. Vmode control aims to keep the gain of the amplifiers down.
The bias current needed for the maximum and the lowest output powers is specified by a PA manufacturer.

The current for the intermediate power levels is then linearly adjusted between these two values.

Frequency synthesizers

RF has separate synthesizers for Rx and Tx. Both synthesizers consist of:
• PLL (Phase-Locked Loop)
• loop filter
• VCO (Voltage Controlled Oscillator)
• balun
The VCO frequencies are locked by PLLs into a reference oscillator, VCTCXO (Voltage Controlled Temperature

Compensated Crystal Oscillator).
The PLLs are located in N7500 and N7501 respectively and controlled via RFBus. PLL charge pump charges or

discharges the integrator capacitor in the loop filter depending on the phase of the measured frequency

compared to the phase of the reference frequency. The integrator output voltage is connected to the control

input of the VCO.
The VCOs operate at the channel frequency multiplied by two in the upper bands (for example, GSM1800/1900/

WCDMA) and by four in EGSM900 (and GSM850, if applicable). The required frequency dividers required for

modulators are integrated in N7501 and those for demodulators in N7500. The dividers are controlled via RFBus.

Figure 37 Phase locked loop in N7500 and N7501 (PLL)

Reference oscillators

A 38.4MHz VCTCXO is used as a reference oscillator for the frequency synthesizers.

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