Nokia 3105 서비스 매뉴얼
CCS Technical Documentation
System Module
RH-48
Issue 1 11/2003 Confidential ©
2003 Nokia Corporation
Page 9
UPP
Introduction
RH-48 uses UPP8Mv3.5 ASIC. The RAM size is 8Mbit. The UPP ASIC is designed to oper-
ate in a DCT4 engine, and is designed as part of the DCT4 common baseband task force.
The DCT4 processor architecture consists of both DSP and MCU processors.
ate in a DCT4 engine, and is designed as part of the DCT4 common baseband task force.
The DCT4 processor architecture consists of both DSP and MCU processors.
Blocks
UPP is internally partitioned into two main parts: the Brain and the Body.
The Brain consists of the Processor and Memory System (i.e., Processor cores, Mega-cells,
internal memories, peripherals, and external memory interface). The following blocks are
included: the DSP Subsystem (DSPSS), the MCU Subsystem (MCUSS), the emulation con-
trol EMUCtl, the program/data RAM PDRAM, and the Brain Peripherals–subsystem
(BrainPer).
included: the DSP Subsystem (DSPSS), the MCU Subsystem (MCUSS), the emulation con-
trol EMUCtl, the program/data RAM PDRAM, and the Brain Peripherals–subsystem
(BrainPer).
Table 6: RF-BB Analog Signals
Signal name
From
To
Parameter
Min
Typ
Max
Unit
Function
RX_IP_RF
RX_IN_RF
RX_QP_RF
RX_QN_RF
Yoda
UEM
Differential voltage
swing (static)
--------------------------
DC level
--------------------------
Input Bandwidth
0.3
--------
1.3
--------
0.5
-------
1.35
-------
1.0
--------
1.4
--------
615
Vpp
-------
V
-------
kHz
Differential in-phase
and quadrature RX
baseband signal
Analog Out of RF
TX_IP_RF
TX_IN_RF
TX_QP_RF
TX_QN_RF
UEM
Jedi
Differential voltage
swing (static)
---------------------------
DC level
---------------------------
-3 dB Bandwidth
0.4
--------
1.65
--------
650
0.8
-------
1.7
-------
1.2
-------
1.75
--------
1950
Vpp
-------
V
-------
kHz
Differential quadra-
ture phase TX base-
band signal for RF
modulator
Analog into RF
Table 7: RFIC Control
Signal name
From
To
Parameter
Min
Typ
Max
Unit
Function
RF_BUS_CLK
RF_BUS_DATA
RF_BUS_EN1X
UPP
Jedi, Yoda
High-level input
voltage, V
IH
Low-level input
voltage, V
IL
High-level output
voltage, V
OH
Low-level output
voltage, V
OL
Clock
1.72
1.72
1.8
1.8
9.6
1.86
0.4
1.86
0.4
V
V
V
V
MHz
Serial Clock =
Digital Into RF
Bidirectional
Serial Date =
Digital I/O
Latch enable for
Jedi and Yoda =
Digital Into RF