Nokia 8270 서비스 매뉴얼
NSD-5
3. System Module
PAMS Technical Documentation
Page 34
Nokia Corporation
Issue 1 05/02
With 2–wire charging, the charger provides constant output current, and the charging is
controlled by the PWMOUT signal from CCONT to CHAPS. PWMOUT signal frequency is
1 Hz, and the charging switch in CHAPS is pulsed on and off at this frequency. The pulse
width of PWMOUT is controlled through the serial data bus.
controlled by the PWMOUT signal from CCONT to CHAPS. PWMOUT signal frequency is
1 Hz, and the charging switch in CHAPS is pulsed on and off at this frequency. The pulse
width of PWMOUT is controlled through the serial data bus.
There is a protection mechanism in CHAPS to protect the phone from over-charging the
phone’s voltage. When a charger is connected to the phone, if VBAT exceeds preset limits
in CHAPS, the switch immediately turns OFF (soft switching is bypassed). There are two
voltage limits: VLIM1 and VLIM2. VLIM input = “0” selects VLIM1; VLIM input = “1”
selects VLIM2.
phone’s voltage. When a charger is connected to the phone, if VBAT exceeds preset limits
in CHAPS, the switch immediately turns OFF (soft switching is bypassed). There are two
voltage limits: VLIM1 and VLIM2. VLIM input = “0” selects VLIM1; VLIM input = “1”
selects VLIM2.
When the switch turns off due to an overvoltage condition, it stays off until the input
voltage falls below the specified limit (VCH<VBAT). Phone software will stop the charg-
ing as fast as it detects that there is no battery present.
voltage falls below the specified limit (VCH<VBAT). Phone software will stop the charg-
ing as fast as it detects that there is no battery present.
CCONT/MAD4 and CCONT/Others Interface Signals
Table 8 lists all of the inputs and outputs of the Power Management section.
Symbol
Parameter
Min
Typ
Max
VLIM1 (V)
Output voltage cutoff limit (during transmission or Li-battery)
4.4
4.6
4.8
VLIM2 (V)
Output voltage cutoff limit (no transmission or Ni-battery)
4.8
5.0
5.2
Signal
To
Signal Level (V)
High Low
Rising
time
Falling
time
Function
MAD4
CLK_EN
CCONT
> 2.4
< 0.62
16 ns
16 ns
Enable VR1 and CAFE
CDMA clock output
CDMA clock output
CCONTCSX
CCONT
> 2.4
< 0.62
16 ns
16 ns
Serial bus select
UIF_CCONT_SDIO
CCONT
> 2.4
< 0.62
10
10
Serial bus data
UIF_CCONT_SCLK
CCONT
> 2.4
< 0.62
10
10
Serial interface clock, also
used for LCD
used for LCD
CCONT_INT
MAD
> 2.1
< 0.5
25
25
Interrupt signal to MAD
PURX
MAD
> 2.1
< 0.5
25
25
Power up reset
SLEEPCLK
MAD
> 2.1
< 0.5
25
25
32 kHz clock
VLIM
CHAPS
> 2.24
< 0.62
N/S
(a)
N/S
(a)
Chaarge voltage limit
control
control
CAFE_TX_GATE
from MAD
> 2.24
< 0.62
16 ns
16 ns
RF
PA_TEMP
from TX
N/A
(b)
N/A
(b)
N/A
(b)
N/A
(b)
PA temperature mux’ed
with VCXO_TEMP
with VCXO_TEMP