FIC a985 서비스 매뉴얼
Hardware Functional Overview
FIC A985 Service Manual
4-5
designed for much more interactive, highly integrative usage models such as collaborative
workgroups, Internet audio and streaming video, image processing, video content creation,
speech, 3-D, games, multimedia and multi-tasking user environments. It also delivers a
world-class user experience across basic standalone office applications. The Pentium 4
processor offers great performance for today’s and tomorrow’s applications.
Intel's Pentium 4 processor, based on the Intel® NetBurst™ micro-architecture, includes
several new performance enhancing features :
workgroups, Internet audio and streaming video, image processing, video content creation,
speech, 3-D, games, multimedia and multi-tasking user environments. It also delivers a
world-class user experience across basic standalone office applications. The Pentium 4
processor offers great performance for today’s and tomorrow’s applications.
Intel's Pentium 4 processor, based on the Intel® NetBurst™ micro-architecture, includes
several new performance enhancing features :
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Hyper Pipelined Technology:
A deeper pipeline enables instructions inside the processor to be queued and executed
at a much faster rate, and allows the Pentium 4 processor to achieve the world's
highest clock speeds for desktop PCs.
A deeper pipeline enables instructions inside the processor to be queued and executed
at a much faster rate, and allows the Pentium 4 processor to achieve the world's
highest clock speeds for desktop PCs.
•
Streaming SIMD Extensions 2:
Streaming SIMD Extensions 2 consists of 144 new instructions including SIMD
double precision floating point, SIMD 128-bit integer, and new cache and memory
management instructions. Streaming SIMD Extensions 2 enhances performance to
accelerate video, speech, encryption, imaging, and the most demanding of Internet
computing, and non-threaded workstation applications.
Streaming SIMD Extensions 2 consists of 144 new instructions including SIMD
double precision floating point, SIMD 128-bit integer, and new cache and memory
management instructions. Streaming SIMD Extensions 2 enhances performance to
accelerate video, speech, encryption, imaging, and the most demanding of Internet
computing, and non-threaded workstation applications.
•
400-MHz Intel NetBurst Micro-Architecture System Bus:
With three times the bandwidth of previous processors, the 400 MHz system bus
speeds the transfer of information from the processor to the rest of the system,
improving throughput and performance. This breakthrough technology extends the
potential for superior processing speeds to the rest of the system.
With three times the bandwidth of previous processors, the 400 MHz system bus
speeds the transfer of information from the processor to the rest of the system,
improving throughput and performance. This breakthrough technology extends the
potential for superior processing speeds to the rest of the system.
•
Dynamic Execution:
Extends the Dynamic Execution features found in the previous generation P6 micro-
architecture. Improved branch prediction accelerates the flow of work to the
processor and helps overcome the deeper pipeline. Very deep out-of-order speculative
execution carries out over 100 instructions speculatively, ensuring that the processor's
superscalar execution units remain busy, improving overall execution.
Extends the Dynamic Execution features found in the previous generation P6 micro-
architecture. Improved branch prediction accelerates the flow of work to the
processor and helps overcome the deeper pipeline. Very deep out-of-order speculative
execution carries out over 100 instructions speculatively, ensuring that the processor's
superscalar execution units remain busy, improving overall execution.
•
Enhanced Floating Point/Multimedia Unit:
A 128-bit floating-point port and a second port for data movement enable smooth
lifelike 3D and graphics.
A 128-bit floating-point port and a second port for data movement enable smooth
lifelike 3D and graphics.
•
Execution Trace Cache:
Advanced L1 instruction cache removes decoder pipeline latency, and caches
"decoded" instructions, thus improving efficiency and hit rate to cached instructions.
The 12 Kµop portion of the L1 cache supplies decoded instructions into the processor
pipeline. There is also an 8 KB data portion of L1 cache.
Advanced L1 instruction cache removes decoder pipeline latency, and caches
"decoded" instructions, thus improving efficiency and hit rate to cached instructions.
The 12 Kµop portion of the L1 cache supplies decoded instructions into the processor
pipeline. There is also an 8 KB data portion of L1 cache.
•
Rapid Execution Engine:
The Integer Arithmetic Logic Unit (ALU) clocked at twice the frequency provides
four ALUs of computing bandwidth and allows lower latency execution increasing
performance for certain integer operations.
The Integer Arithmetic Logic Unit (ALU) clocked at twice the frequency provides
four ALUs of computing bandwidth and allows lower latency execution increasing
performance for certain integer operations.
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