Intel architecture ia-32 사용자 설명서
Vol. 3A 3-35
PROTECTED-MODE MEMORY MANAGEMENT
Figure 3-20. Format of Page-Directory-Pointer-Table, Page-Directory, and Page-Table
Entries for 4-KByte Pages with PAE Enabled
63
36 35
32
Base
Reserved (set to 0)
Page-Directory-Pointer-Table Entry
31
12 11
9 8
5 4 3 2
0
P
C
D
D
P
W
T
Avail
Page-Directory Base Address
Addr.
Res.
Reserved
63
36 35
32
Base
Reserved (set to 0)
Page-Directory Entry (4-KByte Page Table)
31
12 11
9 8 7 6 5 4 3 2 1 0
P
C
0
D
P
P
W
T
Page-Table Base Address
Addr.
0 0
A
R
/
W
U
/
S
63
36 35
32
Base
Reserved (set to 0)
Page-Table Entry (4-KByte Page)
31
12 11
9 8 7 6 5 4 3 2 1 0
P
C
D
D
P
P
W
T
Page Base Address
Addr.
G
A
R
/
W
U
/
S
Avail
Avail
P
1
P
A
T
T