Intel i5-2400S BX80623I52400S 사용자 설명서
제품 코드
BX80623I52400S
Datasheet, Volume 1
5
Graphics Render C-State ......................................................................... 55
Smart 2D Display Technology (Intel
®
S2DDT) .................................. 55
Graphics Dynamic Frequency.......................................................... 56
Thermal Management .............................................................................................. 57
Signal Description ................................................................................................... 59
6.1
6.1
Flexible Display Interface Signals ............................................................... 63
6.10 Power Sequencing ............................................................................................. 65
6.11 Processor Power Signals..................................................................................... 66
6.12 Sense Pins ....................................................................................................... 66
6.13 Ground and NCTF .............................................................................................. 66
6.14 Processor Internal Pull Up/Pull Down.................................................................... 67
6.11 Processor Power Signals..................................................................................... 66
6.12 Sense Pins ....................................................................................................... 66
6.13 Ground and NCTF .............................................................................................. 66
6.14 Processor Internal Pull Up/Pull Down.................................................................... 67
Electrical Specifications ........................................................................................... 69
7.1
7.1
Voltage Identification (VID) .......................................................................... 70
7.11 Platform Environmental Control Interface (PECI) DC Specifications........................... 84
7.11.1 PECI Bus Architecture ............................................................................. 84
7.11.2 DC Characteristics .................................................................................. 85
7.11.3 Input Device Hysteresis .......................................................................... 85
7.11.2 DC Characteristics .................................................................................. 85
7.11.3 Input Device Hysteresis .......................................................................... 85
Processor Pin and Signal Information...................................................................... 87
8.1
8.1
DDR Data Swizzling ............................................................................................... 107